MC68EC060RC50 Freescale Semiconductor, MC68EC060RC50 Datasheet - Page 398

• Manufacturer Part Number: MC68EC060RC50
• Description: IC MPU 32BIT 50MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC060RC50

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 50MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Operating Temp Range: 0C to 110C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 206
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

MC68060 Instructions
D-8
JMP
JSR
LEA
LINK
LPSTOP
LSL, LSR
MOVE
MOVEA
MOVE from CCR
MOVE from SR
MOVE to CCR
MOVE to SR
MOVE USP
MOVE16
MOVEC
MOVEM
MOVEP
MOVEQ
MOVES
MULS
MULU
NBCD
NEG
NEGX
NOP
NOT
OR
ORI
ORI to CCR
ORI to SR
PACK
PBcc
PDBcc
PEA
PFLUSH
PFLUSHA
PFLUSHR
PFLUSHS
PLOAD
PLPA
PMOVE
PRESTORE
PSAVE
PScc
PTEST
PTRAPcc
PVALID
RESET
ROL, ROR
ROXL, ROXR
RTD
RTE
RTM
RTR
RTS
Mnemonic
Table D-2. M68000 Family Instruction Set (Continued)
Jump
Jump to Subroutine
Load Effective Address
Link and Allocate
Low-Power Stop
Logical Shift Left and Right
Move
Move Address
Move from Condition Code Register
Move from Status Register
Move to Condition Code Register
Move to Status Register
Move User Stack Pointer
16-Byte Block Move
Move Control Register
Move Multiple Registers
Move Peripheral
Move Quick
Move Alternate Address Space
Signed Multiply
Unsigned Multiply
Negate Decimal with Extend
Negate
Negate with Extend
No Operation
Logical Complement
Logical Inclusive-OR
Logical Inclusive-OR Immediate
Inclusive-OR Immediate to Condition Code Register
Inclusive-OR Immediate to Status Register
Pack BCD
Branch on PMMU Condition
Test, Decrement, and Branch on PMMU Condition
Push Effective Address
Flush Entry(ies) in the ATCs
Flush Entry(ies) in the ATCs
Flush Entry(ies) in the ATCs and RPT Entries
Flush Entry(ies) in the ATCs
Load an Entry into the ATC
Load Physical Address
Move PMMU Register
PMMU Restore Function
PMMU Save Function
Set on PMMU Condition
Test a Logical Address
Trap on PMMU Condition
Validate a Pointer
Reset External Devices
Rotate Left and Right
Rotate with Extend Left and Right
Return and Deallocate
Return from Exception
Return from Module
Return and Restore
Return from Subroutine
M68060 USER’S MANUAL
Description
MOTOROLA