EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 629

IC STRATIX FPGA 40K LE 956-BGA

EP1S40B956C5

Manufacturer Part Number
EP1S40B956C5
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S40B956C5

Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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0
Figure 7–31. Details on Implementation of Symmetric 3
Altera Corporation
September 2004
B
C
A
Note: Unused multipliers and adders grayed out. These
multipliers can be used by other functions.
Implementing High Performance DSP Functions in Stratix & Stratix GX Devices
Logic Elements
In cases where a symmetric 2-D filter is used, pixels sharing the same
filter coefficients from three separate line-stores A, B, and C can be added
together prior to the multiplication operation. This reduces the number of
multipliers used. Referring to
coefficients.
symmetric filter.
Figure 7–30. Symmetric 3
Figure 7–31
shows the implementation of this circular
3 Kernel
3 Convolution Filter Block
Figure
GND
GND
w
w
w w
w
w w
1
2
3
7–30, w
DSP Block - Four Multipliers
Stratix Device Handbook, Volume 2
Adder Mode (9-bit)
1
, w
2
, and w
3
are the filter
y y (m , n )
7–51

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