EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 272

• Manufacturer Part Number: EP1S40B956C5
• Description: IC STRATIX FPGA 40K LE 956-BGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S40B956C5

• Number Of Logic Elements/cells: 41250
• Number Of Labs/clbs: 4125
• Total Ram Bits: 3423744
• Number Of I /o: 683
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 956-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

f
frequency)
(LVDS,LVPECL,
HyperTransport
technology)
f
f
(LVDS,LVPECL,
HyperTransport
technology)
f
frequency)
(PCML)
f
Device operation,
f
(PCML)
TCCS
HSCLK
HSCLK
HSDR
H S C L K
HSCLK
H S D R
Table 4–126. High-Speed I/O Specifications for Wire-Bond Packages (Part 1 of 2)
Device operation,
(Clock
= f
= f
(Clock
Symbol
HSDR
HSDR
/ W
/ W
W = 4 to 30 (Serdes used)
W = 2 (Serdes bypass)
W = 2 (Serdes used)
W = 1 (Serdes bypass)
W = 1 (Serdes used)
J = 10
J = 8
J = 7
J = 4
J = 2
J = 1 (LVDS and LVPECL
only)
W = 4 to 30 (Serdes used)
W = 2 (Serdes bypass)
W = 2 (Serdes used)
W = 1 (Serdes bypass)
W = 1 (Serdes used)
J = 10
J = 8
J = 7
J = 4
J = 2
J = 1
All
Conditions
Min
150
100
300
300
300
300
300
100
100
150
100
300
300
300
300
300
100
100
10
50
10
50
-6 Speed Grade
Typ
77.75
155.5
Max
156
231
312
311
624
624
624
624
624
462
311
150
200
311
311
311
311
311
300
200
400
Min
150
100
300
300
300
300
300
100
100
100
100
100
10
50
50
-7 Speed Grade
Typ
115.5
Max
77.5
231
231
270
462
462
462
462
462
462
270
155
155
155
400
Min
150
100
300
300
300
300
300
100
100
100
100
100
10
50
50
-8 Speed Grade
Typ
115.5
Max
77.5
231
231
270
462
462
462
462
462
462
270
155
155
155
400
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ps