EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 559

IC STRATIX FPGA 40K LE 956-BGA

EP1S40B956C5

Manufacturer Part Number
EP1S40B956C5
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S40B956C5

Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Altera Corporation
July 2005
Adder/Output Block
The adder/output block has the following elements (See
page
You can configure the adder/output block as:
The output select multiplexer sets the output of the DSP block. You can
register the adder/output block’s output using the output registers.
1
An adder/subtractor/accumulator block
A summation block
An output select multiplexer
Output registers
A pure output interface
An accumulator
A simple one-level adder
A two-level adder with dynamic addition/subtraction control on the
first-level adder
The final stage of a 36-bit multiplier
6–10):
You cannot use the adder/output block independently of the
multiplier.
DSP Blocks in Stratix & Stratix GX Devices
Stratix Device Handbook, Volume 2
Figure 6–5 on
6–9

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