MT48H8M16LFB4-75 IT:J Micron Technology Inc, MT48H8M16LFB4-75 IT:J Datasheet - Page 59

MT48H8M16LFB4-75 IT:J

Manufacturer Part Number
MT48H8M16LFB4-75 IT:J
Description
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr
Datasheet

Specifications of MT48H8M16LFB4-75 IT:J

Organization
8Mx16
Density
128Mb
Address Bus
14b
Access Time (max)
8/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
70mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
Figure 36:
Figure 37:
PDF: 09005aef832ff1ea/Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr10_08__3.fm - Rev. E 4/09 EN
Internal
states
Internal
States
READ With Auto Precharge Interrupted by a READ
READ With Auto Precharge Interrupted by a WRITE
Notes:
Notes:
Command
Command
Address
Bank m
Address
Bank m
Bank n
Bank n
DQM
CLK
CLK
DQ
1. DQM is LOW.
DQ
1. DQM is HIGH at T2 to prevent D
1
Page
active
READ - AP
Page active
Bank n,
Bank n
NOP
T0
Col a
T0
READ with burst of 4
READ - AP
Page active
Bank n,
Page active
Bank n
Col a
T1
NOP
CL = 3 (bank n)
T1
READ with burst of 4
T2
CL = 3 (bank n)
T2
NOP
NOP
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
59
READ - AP
Bank m,
T3
Bank m
Col d
T3
OUT
Dout
NOP
a
Interrupt burst, precharge
READ with burst of 4
a + 1 from contending with D
Micron Technology, Inc., reserves the right to change products or specifications without notice.
WRITE - AP
Bank m,
T4
Col d
Bank m
T4
CL = 3 (bank m)
NOP
Din
t
d
Interrupt burst, precharge
RP - bank n
Dout
WRITE with burst of 4
a
T5
T5
NOP
d + 1
NOP
Din
t
Dout
a + 1
RP - bank n
T6
T6
NOP
NOP
d + 2
Din
Dout
d
©2008 Micron Technology, Inc. All rights reserved.
IN
Timing Diagrams
d at T4.
Idle
T7
NOP
Don’t Care
T7
d + 3
NOP
t RP - bank m
Din
t WR - bank m
Don’t Care
Dout
Precharge
d + 1
Write-back
Idle

Related parts for MT48H8M16LFB4-75 IT:J