MT48H8M16LFB4-75 IT:J Micron Technology Inc, MT48H8M16LFB4-75 IT:J Datasheet - Page 46

• Manufacturer Part Number: MT48H8M16LFB4-75 IT:J
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M16LFB4-75 IT:J

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 8/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 70mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant

Figure 21:
Figure 22:
PDF: 09005aef832ff1ea/Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr10_08__3.fm - Rev. E 4/09 EN
READ-to-WRITE With Extra Clock Cycle
READ-to-PRECHARGE
Notes:
Notes:
1. CL = 3. The READ command can be to any bank, and the WRITE command can be to any
1. DQM is LOW.
Command
Command
Command
Address
Address
Address
bank.
DQM
CLK
CLK
CLK
DQ
DQ
DQ
Bank a,
Bank a,
Bank,
T0
Col n
T0
Col n
T0
READ
READ
READ
Col
CL = 2
CL = 3
T1
T1
T1
NOP
NOP
NOP
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
46
T2
T2
T2
NOP
NOP
NOP
Dout
n
Transitioning data
T3
T3
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T3
NOP
NOP
NOP
Dout n
Dout
Dout
n + 1
t HZ
n
PRECHARGE
PRECHARGE
(a or all)
(a or all)
T4
T4
T4
Bank
Bank
NOP
X = 1 cycle
Dout
n + 2
Dout
n + 1
Transitioning data
X = 2 cycles
T5
T5
Don’t Care
T5
Bank,
WRITE
Col b
NOP
NOP
Din b
Dout
n + 3
Dout
n + 2
t DS
t RP
t RP
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T6
T6
Timing Diagrams
NOP
NOP
Dout
n + 3
Don’t Care
ACTIVE
ACTIVE
Bank a,
Bank a,
T7
T7
Row
Row