EW80314GS Q 099 Intel, EW80314GS Q 099 Datasheet - Page 43

• Manufacturer Part Number: EW80314GS Q 099
• Manufacturer: Intel

Specifications of EW80314GS Q 099

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Affected Docs: Intel
22.
Issue:
Affected Docs: Intel
Intel
®
80314 I/O Processor Companion Chip Specification Update
or SRAM, a fabric-read to the memory (through the SFN fabric) is sufficient to flush the receiving
port’s queue. Ensure that the read actually goes through the SFN port to the memory instead of the
Intel XScale
2.3.1.4 Scenario S4: HBA Host Read/Write PCI/X to PCI/X with External DMA
The S4 case occurs in an HBA configuration when the host processor on one PCI/X bus, for
example PCIX(1), makes a request for the Intel XScale
from PCI/X (2) to PCI/X(1). Direct PCI/X(1) requests to PCI/X(2) for a PCI/X(2)-to-PCI/X(1)
DMA transfer are not allowed in embedded mode.
Table 12 not correct
Entries in Table 12 are incorrect. The new table appears as follows:
Table 12: Sync Packet versus Fabric Read Cases
* Please refer to Specification Clarification #15 in the Intel® 80314 I/O Processor Companion Chip Specification Update .
PCIX cannot be the destination (second destination port) of a sync packet
CaseLabel
®
®
S5a
S5b
S1
S2
S3
S4
80314 I/O Processor Companion Chip Developer’s Manual
80314 I/O Processor Companion Chip Developer’s Manual
®
PCI/X External DMA to SDRAM
HBA PC1(2) (host) Read/Write to PCI2(1)
through external DMA
Integrated GigE with descriptor in SRAM and
data in SRAM
Integrated GigE with descriptor in SRAM and
data in SDRAM
External DMA on PCI/X writing to SRAM
Internal DMA (any source/any destination)
CPU’s port to the memory.
Case Description
®
CPU to set up an external DMA transfer
Sync Packet
No sync packet, no fabric read
Descriptor based access control only
Interrupt driven data access not allowed
Fabric Read
Non-destructive fabric read to
downstream PCI/X adaptor device OR
use S1 method, that is, DMA to
SDRAM.*
No sync packet or fabric read required
(GigE automatically flushes data before
updating descriptor)
Fabric Read (CPU to SDRAM)
How to handle
Documentation Changes
43