WG82577LM S LGWS Intel, WG82577LM S LGWS Datasheet - Page 9

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WG82577LM S LGWS

Manufacturer Part Number
WG82577LM S LGWS
Description
Manufacturer
Intel
Datasheet

Specifications of WG82577LM S LGWS

Lead Free Status / RoHS Status
Supplier Unconfirmed
Introduction—82577 GbE PHY
Figure 1.
1.3
82577 Block Diagram
Main Flows
The 82577 main interfaces are PCIe and SMBus on the host side and the MDI interface
on the link side. Transmit traffic is received from the MAC device through either PCIe or
SMBus on the host interconnect and then transmitted on the MDI link. Receive traffic
arrives on the MDI link and transferred to the MAC through either the PCIe or SMBus
interconnects.
The MAC and system software control the 82577 functionality through two
mechanisms:
Specific flows are described in other sections of this document:
• The 82577 configuration registers are mapped into the MDIO space and can be
• The MDIO traffic is embedded in specific fields in SMBus packets or carried by
• Power delivery options are described in
• Power management is described in
Testability
accessed by the MAC through the PCIe or SMBus interconnects.
special packets over the PCIe encoded interconnect as defined by the custom
protocol.
Crystal
Power
Supply
PLL
Pow er
W ake Up
GbE PHY
RX M AC
Host
Filter
Section
Status & Control
SM Bus
SM Bus
Section
M DIO
G M II
6.3.
/
M ultiplexer
4.3.
PHY
M DI
PCIe
PCIe
LEDs
2

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