WG82577LM S LGWS Intel, WG82577LM S LGWS Datasheet - Page 77

• Manufacturer Part Number: WG82577LM S LGWS
• Manufacturer: Intel

Specifications of WG82577LM S LGWS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Programmer’s Visible State—82577 GbE PHY
Table 38.
Diagnostics Control Register (Linking Disabled) - Address 30
15:14
13:12
11:10
9:0
Bits
TDR Request
TDR Tx Dim
TDR Rx Dim
Reserved
Field
R/W, SC
R/W
R/W
Type
00b
00b
00b
Default
Automatic TDR analysis is enabled by setting TDR
request to11b. All ten combinations of pairs are
analyzed in sequence, and the results are available
in Register 31. TDR analysis for a single pair
combination can be enabled by setting TDR request
to 10b. Linking must be disabled (Register 23, bit
13 = 0b) and IP phone detect must be disabled
(Register 23, bit 14 = 0b.) to do TDR operations. Bit
15 self clears when the TDR operation completes.
When TDR completes, bit 14 indicates if the results
are valid.
11b = Automatic TDR analysis in progress.
10b = Single pair TDR analysis in progress.
01b = TDR analysis complete, results valid.
00b = TDR analysis complete, results valid.
Transmit dimension for single-pair TDR analysis/
first dimension to be reported for automatic TDR
analysis:
00b = TDR transmit on pair A.
01b = TDR transmit on pair B.
10b = TDR transmit on pair C.
11b = TDR transmit on pair D.
The TDR transmit dimension is only valid for single
pair TDR analysis. For automatic TDR analysis,
these bits specify the first dimension that are
reported in Register 31.
Receive dimension for single pair TDR analysis:
00b = TDR receive on pair A.
01b = TDR receive on pair B.
10b = TDR receive on pair C.
11b = TDR receive on pair D.
The TDR receive dimension is only valid for single
pair TDR analysis. It is ignored for automatic TDR
analysis when all 10 pair combinations are
analyzed.
Reserved.
Description
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