HC230F1020 Altera, HC230F1020 Datasheet - Page 93
HC230F1020
Manufacturer Part Number
HC230F1020
Description
Manufacturer
Altera
Datasheet
1.HC230F1020.pdf
(228 pages)
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HardCopy II
Device Support
Altera Corporation
September 2008
H51022-2.5
Altera
and provide a structured ASIC alternative to increasingly expensive
multi-million gate ASIC designs. The HardCopy II design methodology
offers a fast time-to-market schedule, providing ASIC designers with a
solution to long ASIC development cycles. Using the Quartus
software, you can leverage a Stratix
seamlessly migrate your design to a HardCopy II device for production.
This document discusses the following topics:
■
■
■
■
1
HardCopy II Design Benefits
Designing with HardCopy II structured ASICs offers substantial benefits
over other structured ASIC offerings:
■
■
■
■
“HardCopy II Development Flow” on page 5–3
“HardCopy II Device Resource Guide” on page 5–7
“HardCopy II Recommended Settings in the Quartus II Software” on
page 5–12
“HardCopy II Utilities Menu” on page 5–25
Prototyping using a Stratix II FPGA for functional verification and
system development reduces total project development time
Seamless migration from a Stratix II FPGA prototype to a
HardCopy II device reduces time to market and risk
Unified design methodology for Stratix II FPGA design and
HardCopy II design reduces the need for ASIC development
software
Low up-front development cost of HardCopy II devices reduces the
financial risk to your project
®
HardCopy
For more information about HardCopy II, HardCopy Stratix,
and HardCopy APEX™ devices, refer to the respective device
data sheets in the HardCopy Series Handbook.
®
II devices feature 1.2-V, 90 nm process technology,
5. Quartus II Support for
HardCopy II Devices
®
II FPGA as a prototype and
Preliminary
®
II
5–1
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