HC230F1020 Altera, HC230F1020 Datasheet - Page 13
HC230F1020
Manufacturer Part Number
HC230F1020
Description
Manufacturer
Altera
Datasheet
1.HC230F1020.pdf
(228 pages)
Specifications of HC230F1020
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HC230F1020ANQ
Manufacturer:
Discera
Quantity:
2 000
- Current page: 13 of 228
- Download datasheet (4Mb)
Altera Corporation
September 2008
■
■
■
■
■
■
■
■
■
1
Unlike Stratix II FPGAs, the HardCopy II M4K block contents cannot
be pre-loaded with a Memory Initialization File (.mif) when used as
RAM. When used as ROM, HardCopy II M4K blocks are initialized
to the ROM contents.
When used as RAM, and you select the non-registered output mode,
HardCopy II M4K and M-RAM blocks power up with outputs
unknown. In Stratix II FPGAs, M4K blocks power up with outputs
cleared, while M-RAM blocks power up with outputs unknown. If
registered outputs mode is selected, the outputs are cleared on both
the M4K and M-RAM blocks in HardCopy II.
The memory contents are unknown under both instances.
All HardCopy II clock network features are the same as in Stratix II
FPGAs.
Enhanced PLL and fast PLL implementations in HardCopy II
devices are the same as in Stratix II FPGAs.
All Stratix II I/O features and supported I/O standards are offered
in HardCopy II devices.
The Joint Test Action Group (JTAG) boundary scan order and length
in HardCopy II devices is different than that of the Stratix II FPGA.
Use a HardCopy II boundary-scan description language (BSDL) file
that describes the re-ordered and shortened boundary scan chain.
Unlike Stratix II devices, HardCopy II devices are customized using
two metal layers. Therefore, configuration circuitry is not required.
FPGA configuration emulation and other configuration modes,
including remote system upgrades and design security using
configuration bitstream encryption, are not supported in
HardCopy II devices.
Even though configuration is not required, the CRC_ERROR pin
function is supported by the HardCopy II using Quartus II software
version 6.0 and above. There is no need to recompile the Stratix II
design to eliminate this feature.
Only supplementary information to highlight HardCopy II
similarities and differences compared to the Stratix II FPGA
architecture and functionality is provided in this chapter. For
more information on similarities and differences of available
resources of the HardCopy II, refer to the Migrating Stratix II
Device Resources to HardCopy II Devices chapter of this Handbook.
In addition, the Stratix II Device Handbook has detailed
explanations of architectural features and functions that are
similar to the HardCopy II devices.
HardCopy II and Stratix II Similarities and Differences
Preliminary
2–5
Related parts for HC230F1020
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: