DS33R11 Maxim Integrated Products, DS33R11 Datasheet - Page 142

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DS33R11

Manufacturer Part Number
DS33R11
Description
Network Controller & Processor ICs Ethernet Mapper with Integrated T1-E1-J1
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33R11

Product
Framer
Number Of Transceivers
1
Supply Voltage (max)
1.89 V, 3.465 V
Supply Voltage (min)
1.71 V, 3.135 V
Supply Current (max)
100 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
BGA

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Register Name:
Register Description:
Register Address:
Bits 0 - 2: CAS Latency Mode (LTMOD0 - LTMOD2) These bits are used to setup CAS Latency
Note: Only CAS Latency of 2 or 3 is allowed
Note: This register has a nonzero default value. This should be taken into consideration when initializing
the device.
Note: After changing the value of this register, the user must toggle the GL.SDMODEWS.SDMW bit to write
the new values to the SDRAM.
Register Name:
Register Description:
Register Address:
Bit 0: SDRAM Mode Write (SDMW) Setting this bit to 1 will write the current values of the mode control and
refresh time control registers to the SDRAM. The user must clear this bit and set it again for subsequent write
operations.
Register Name:
Register Description
Register Address:
Bits 0 - 7: SDRAM Refresh Time Control (SREFT0 – SREFT7) These 8 bits are used to control the SDRAM
refresh frequency. The refresh rate will be equal to this register value x 8 x 100MHz.
Note: This register has a nonzero default value. This should be taken into consideration when initializing
the device.
Note: After changing the value of this register, the user must toggle the GL.SDMODEWS.SDMW bit to write
the new values to the SDRAM.
Bit #
Name
Default
Bit #
Name
Default
Bit #
Name
Default
SREFT7
7
0
-
7
0
7
0
-
SREFT6
6
0
-
6
1
6
0
-
GL.SDMODE2
Global SDRAM Mode Register 2
3Bh
Global SDRAM Mode Register Write Status
3Ch
GL.SDRFTC
Global SDRAM Refresh Time Control
3Dh
GL.SDMODEWS
SREFT5
5
0
-
5
0
5
0
-
142 of 344
SREFT4
4
0
-
0
4
0
4
-
SREFT3
3
0
-
3
0
3
0
-
LTMOD2
SREFT2
2
0
2
0
2
1
-
LTMOD1
SREFT1
1
1
1
0
1
1
-
LTMOD0
SREFT0
SDMW
0
0
0
0
0
0

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