PIC18F452-I/LG Microchip Technology, PIC18F452-I/LG Datasheet - Page 244

• Manufacturer Part Number: PIC18F452-I/LG
• Description: IC MCU FLASH 16KX16 W/AD 44PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-I/LG

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• For Use With: XLT44L2 - SOCKET TRAN ICE 44PLCCDVA16XL441 - ADAPTER DEVICE ICE 44PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18FXX2
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39564C-page 242
Q Cycle Activity:
After Interrupt
operation
Decode
PC
W
BSR
STATUS
GIE/GIEH, PEIE/GIEL
No
Q1
operation
operation
Return from Interrupt
[ label ]
s
(TOS)
1
if s = 1
(WS)
(STATUSS)
(BSRS)
PCLATU, PCLATH are unchanged.
GIE/GIEH, PEIE/GIEL.
Return from Interrupt. Stack is
popped and Top-of-Stack (TOS) is
loaded into the PC. Interrupts are
enabled by setting either the high
or low priority global interrupt
enable bit. If ‘s’ = 1, the contents of
the shadow registers WS,
STATUSS and BSRS are loaded
into their corresponding registers,
W, STATUS and BSR. If ‘s’ = 0, no
update of these registers occurs
(default).
1
2
RETFIE
0000
No
No
Q2
[0,1]
GIE/GIEH or PEIE/GIEL,
W,
PC,
1
RETFIE [s]
0000
BSR,
operation
operation
=
=
=
=
=
No
No
STATUS,
Q3
TOS
WS
BSRS
STATUSS
1
0001
pop PC from
Set GIEH or
operation
stack
GIEL
No
Q4
000s
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
TABLE
Q Cycle Activity:
:
:
:
CALL TABLE ; W contains table
ADDWF PCL
RETLW k0
RETLW k1
RETLW kn
Before Instruction
After Instruction
operation
Decode
W
W
No
Q1
; offset value
; W now has
; table value
; W = offset
; Begin table
;
; End of table
=
=
operation
Return Literal to W
[ label ]
0
k
(TOS)
PCLATU, PCLATH are unchanged
None
W is loaded with the eight-bit literal
'k'. The program counter is loaded
from the top of the stack (the return
address). The high address latch
(PCLATH) remains unchanged.
1
2
literal 'k'
Read
0000
No
Q2
0x07
value of kn
k
© 2006 Microchip Technology Inc.
W,
255
PC,
RETLW k
1100
operation
Process
Data
No
Q3
kkkk
pop PC from
stack, Write
operation
to W
No
Q4
kkkk