PIC18F452-I/LG Microchip Technology, PIC18F452-I/LG Datasheet - Page 185

• Manufacturer Part Number: PIC18F452-I/LG
• Description: IC MCU FLASH 16KX16 W/AD 44PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-I/LG

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• For Use With: XLT44L2 - SOCKET TRAN ICE 44PLCCDVA16XL441 - ADAPTER DEVICE ICE 44PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(V
V
The A/D converter has a unique feature of being able
to operate while the device is in SLEEP mode. To oper-
ate in SLEEP, the A/D conversion clock must be
derived from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter, which generates the result via successive
approximation.
A device RESET forces all registers to their RESET
state. This forces the A/D module to be turned off and
any conversion is aborted.
FIGURE 17-1:
© 2006 Microchip Technology Inc.
REF
DD
* These channels are implemented only on the PIC18F4X2 devices.
+ pin and RA2/AN2/V
and V
Converter
SS
10-bit
A/D
), or the voltage level on the RA3/AN3/
Reference
Voltage
A/D BLOCK DIAGRAM
REF
- pin.
V
V
REF
REF
-
+
(Input Voltage)
PCFG<3:0>
V
AIN
V
DD
V
Each port pin associated with the A/D converter can be
configured as an analog input (RA3 can also be a
voltage reference) or as a digital I/O.
The ADRESH and ADRESL registers contain the result
of the A/D conversion. When the A/D conversion is
complete, the result is loaded into the ADRESH/
ADRESL registers, the GO/DONE bit (ADCON0<2>) is
cleared, and A/D interrupt flag bit, ADIF is set. The block
diagram of the A/D module is shown in Figure 17-1.
SS
CHS<2:0>
111
110
101
100
011
010
001
000
PIC18FXX2
DS39564C-page 183
AN7*
AN2
AN1
AN0
AN6*
AN5*
AN4
AN3