ATA6616-P3QW Atmel, ATA6616-P3QW Datasheet - Page 59

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ATA6616-P3QW

Manufacturer Part Number
ATA6616-P3QW
Description
TXRX MULTICHIP MOD LIN SIP 38QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6616-P3QW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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4.5.3.8
9132D–AUTO–12/10
Clock Monitoring
A safe system needs to monitor its clock sources. Two domains need to be monitored:
In the first domain, the user (code) can easily check the validity of the clock(s)
Command” on page
In the second domain, the lack of a clock results in the code not running. Thus, the presence
of the system clock needs to be monitored by hardware.
Using the on-chip watchdog allows this monitoring. Normally, the watchdog reloading is per-
formed only if the code reaches some specific software labels, reaching these labels proves
that the system clock is running. Otherwise the watchdog reset is enabled. This behavior can
be considered as a clock monitoring.
If the standard watchdog functionality is not desired, the Atmel
mits the system clock to be monitored without having to resort to the complexity of a full
software watchdog handler. The solution proposed in the Atmel ATtiny87/167 is to automate
the watchdog reloading with only one command, at the beginning of the session.
So, to monitor the system clock, the user will have two options:
The two options are exclusive.
Warning:
These two options make sense ONLY if the clock source at RESET is an INTERNAL
SOURCE. The fuse settings determine this operation.
Figure 4-15. Watchdog Timer with Automatic Reloading
The ‘Enable Watchdog in Automatic Reload Mode’ command has priority over the standard
watchdog enabling. In this mode, only the reset function of the watchdog is enabled (no more
watchdog interrupt). The WDP3..0 bits of the WDTCSR register always determine the watch-
dog timer prescaling.
As the watchdog will not be active before executing the ‘Enable Watchdog in Automatic
Reload Mode’ command, it is recommended to activate this command before switching to an
external clock source (See following notes).
• Clock sources for peripherals,
• Clocks sources for system clock generation.
1. Using the standard watchdog features (software reload),
2. Or using the automatic reloading (hardware reload).
WDTCSR
Interrupt
Register:
Reset
WD
WD
57.).
Internal Bus
WatchDog
Reload
0
Atmel ATA6616/ATA6617
1
Checker
WatchDog Clock
Enable
®
ATtiny87/167 watchdog per-
Automatic
Reloading
Mode
System CLK
(See “COUT
59

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