ATA6616-P3QW Atmel, ATA6616-P3QW Datasheet - Page 295

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ATA6616-P3QW

Manufacturer Part Number
ATA6616-P3QW
Description
TXRX MULTICHIP MOD LIN SIP 38QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6616-P3QW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA6616-P3QW
Manufacturer:
ATMEL
Quantity:
950
Part Number:
ATA6616-P3QW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
4.26
Notes:
9132D–AUTO–12/10
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
Address
Register Summary (Continued)
2. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
3. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
4. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other AVR
5. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
1. Address bits exceeding EEAMSB
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such status flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel
a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for
the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and
LD/LDS/LDD instructions can be used.
Reserved
Reserved
Reserved
PORTB
PORTA
Name
DDRB
DDRA
PINB
PINA
PORTB7
PORTA7
PINB7
PINA7
DDB7
DDA7
Bit 7
PORTB6
PORTA6
PINB6
PINA6
DDB6
DDA6
Bit 6
(Table 4-74 on page
PORTB5
PORTA5
PINB5
PINA5
DDB5
DDA5
Bit 5
PORTB4
PORTA4
PINB4
PINA4
DDB4
DDA4
Bit 4
253) are don’t care.
PORTB3
PORTA3
PINB3
PINA3
DDB3
DDA3
Bit 3
Atmel ATA6616/ATA6617
PORTB2
PORTA2
PINB2
PINA2
DDB2
DDA2
Bit 2
PORTB1
PORTA1
PINB1
PINA1
DDB1
DDA1
Bit 1
PORTB0
PORTA0
PINB0
PINA0
DDB0
DDA0
Bit 0
®
s, the CBI and SBI
®
ATtiny87/167 is
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295

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