ATA6616-P3QW Atmel, ATA6616-P3QW Datasheet - Page 296

• Manufacturer Part Number: ATA6616-P3QW
• Description: TXRX MULTICHIP MOD LIN SIP 38QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6616-P3QW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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296
ARITHMETIC AND LOGIC INSTRUCTIONS
BRANCH INSTRUCTIONS
Mnemonics
RCALL
ICALL
SBRC
BRBC
BREQ
BRNE
RJMP
CPSE
SBRS
BRBS
ADIW
SBIW
CALL
SUBI
SBCI
ANDI
COM
SBIC
EOR
NEG
IJMP
RETI
SBIS
ADD
ADC
SUB
SBC
AND
SBR
CBR
DEC
SER
CPC
TST
CLR
JMP
RET
ORI
INC
CPI
OR
CP
Instruction Set Summary
Atmel ATA6616/ATA6617
Operands
Rd, Rr
Rd, Rr
Rd, Rr
Rd, Rr
Rd, Rr
Rd, Rr
Rd, Rr
Rd,Rr
Rd,Rr
Rd, K
Rd, K
Rd, K
Rd, K
Rd,Rr
Rdl,K
Rdl,K
Rd,K
Rd,K
Rd,K
Rr, b
Rr, b
P, b
P, b
s, k
s, k
Rd
Rd
Rd
Rd
Rd
Rd
Rd
k
k
k
k
k
k
Subtract with Carry Constant from Reg.
Logical AND Register and Constant
Logical OR Register and Constant
Compare Register with Immediate
Subtract with Carry two Registers
Skip if Bit in I/O Register Cleared
Subtract Constant from Register
Skip if Bit in I/O Register is Set
Subtract Immediate from Word
Branch if Status Flag Cleared
Add with Carry two Registers
Skip if Bit in Register Cleared
Skip if Bit in Register is Set
Branch if Status Flag Set
Relative Subroutine Call
Add Immediate to Word
Exclusive OR Registers
Compare, Skip if Equal
Subtract two Registers
Logical AND Registers
Clear Bit(s) in Register
Test for Zero or Minus
Direct Subroutine Call
Logical OR Registers
Set Bit(s) in Register
Compare with Carry
Indirect Jump to (Z)
Branch if Not Equal
One’s Complement
Two’s Complement
Add two Registers
Subroutine Return
Indirect Call to (Z)
Interrupt Return
Branch if Equal
Clear Register
Relative Jump
Description
Set Register
Direct Jump
Decrement
Increment
Compare
if (SREG(s) = 1) then PC PC+k + 1
if (SREG(s) = 0) then PC PC+k + 1
if (Z = 1) then PC
if (Z = 0) then PC
if (Rd = Rr) PC
if (Rr(b)=0) PC
if (Rr(b)=1) PC
if (P(b)=0) PC
if (P(b)=1) PC
Rdh:Rdl
Rdh:Rdl
Rd
Rd
PC
Rd
PC
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
PC
PC
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Operation
Rd
Rd Rr C
Rd
PC
PC
PC
PC
Rd Rr
Rd + Rr + C
Rd K
Rd - Rr - C
PC + k + 1
Rd - K - C
PC + k + 1
0xFF Rd
0x00 Rd
Rd
Rd
Rd
Rd + Rr
Rd v Rr
Rd
Rdh:Rdl + K
Rd - Rr
Rd
Rd v K
Rd + 1
STACK
STACK
Rd - K
Rdh:Rdl - K
Rd v K
Rd 1
0xFF
(0xFF - K)
Z
Z
k
k
PC + 2 or 3
PC + 2 or 3
PC + 2 or 3
PC + 2 or 3
PC + 2 or 3
Rd
Rr
Rr
Rd
PC + k + 1
PC + k + 1
K
Z, N,V,C,H
Z, N,V,C,H
Z, N,V,C,H
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,S
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,S
Z,C,N,V,H
Z,C,N,V
Flags
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
I
9132D–AUTO–12/10
#Clocks
1/2/3
1/2/3
1/2/3
1/2/3
1/2/3
1/2
1/2
1/2
1/2
1
1
2
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
3
3
3
4
4
4
1
1
1