ATA6616-P3QW Atmel, ATA6616-P3QW Datasheet - Page 45

• Manufacturer Part Number: ATA6616-P3QW
• Description: TXRX MULTICHIP MOD LIN SIP 38QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6616-P3QW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.4.4
4.4.4.1
4.4.5
4.4.5.1
9132D–AUTO–12/10
I/O Memory
Register Description
General Purpose I/O Registers
EEARH and EEARL – EEPROM Address Register
The I/O space definition of the Atmel
mary” on page
All Atmel ATtiny87/167 I/Os and peripherals are placed in the I/O space. All I/O locations may
be accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the
32 general purpose working registers and the I/O space. I/O Registers within the address
range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these reg-
isters, the value of single bits can be checked by using the SBIS and SBIC instructions. Refer
to the instruction set section for more details. When using the I/O specific commands IN and
OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data
space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel
ATtiny87/167 is a complex microcontroller with more peripheral units than can be supported
within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended
I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can
be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can there-
fore be used on registers containing such Status Flags. The CBI and SBI instructions work
with registers 0x00 to 0x1F only.
The I/O and Peripherals Control Registers are explained in later sections.
The Atmel
be used for storing any information, and they are particularly useful for storing global variables
and Status Flags.
The General Purpose I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
• Bit 7:1 – Reserved Bits
These bits are reserved for future use and will always read as 0 in Atmel
Bit
Bit
Read/Write
Read/Write
Initial Value
Initial Value
®
ATtiny87/167 contains three General Purpose I/O Registers. These registers can
EEAR7
290.
R/W
R
7
7
0
X
-
EEAR6
R/W
R
6
6
0
X
-
EEAR5
R/W
R
5
5
0
X
-
®
ATtiny87/167 is shown in
EEAR4
R/W
R
X
4
4
0
-
Atmel ATA6616/ATA6617
EEAR3
R/W
R
X
3
3
0
-
EEAR2
R/W
R
X
2
2
0
-
Section 4.26 “Register Sum-
EEAR1
R/W
R
X
1
1
0
-
®
ATtiny87/167.
EEAR8
EEAR0
R/W
R/W
X
X
0
0
EEARH
EEARL
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