ATA6616-P3QW Atmel, ATA6616-P3QW Datasheet - Page 204

• Manufacturer Part Number: ATA6616-P3QW
• Description: TXRX MULTICHIP MOD LIN SIP 38QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6616-P3QW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.16.5.16
4.16.6
4.16.6.1
204
Atmel ATA6616/ATA6617
LIN / UART Register Description
OCD Support
LIN Control Register - LINCR
When a debugger break occurs, the state machine of the LIN/UART controller is stopped
(included frame time-out) and further communication may be corrupted.
Table 4-52.
• Bit 7 - LSWRES: Software Reset
• Bit 6 - LIN13: LIN 1.3 mode
LINBRRH
LINBRRL
LINENIR
LINERR
LINBTR
LINDLR
LINSEL
LINDAT
Initial Value
LINSIR
LINIDR
Read/Write
LINCR
Name
Bit
– 0 = No action,
– 1 = Software reset (this bit is self-reset at the end of the reset procedure).
– 0 = LIN 2.1 (default),
– 1 = LIN 1.3.
LSWRES
0
0
0
0
0
0
0
0
1
0
0
LABORT
LTXDL3
LDATA7
LIDST2
LDISR
LDIV7
Bit 7
LP1
LSWRES
—
—
—
LIN/UART Register Bits Summary
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
7
0
0
0
0
0
0
0
0
0
0
0
0
LTOERR
LTXDL2
LDATA6
LIDST1
LDIV6
LIN13
Bit 6
LP0
LIN13
—
—
—
R/W
R/W
R/W
R/W
R/W
6
0
R
R
R
R
R
R
R
LID5/LDL1 LID4/LDL0
0
0
0
0
1 R/(W) 0 R/(W) 0 R/(W) 0 R/(W) 0 R/(W) 0 R/(W)
0
0
0
0
0
0
LOVERR
LCONF1
LCONF1 LCONF0
LTXDL1
LDATA5
LIDST0
LDIV5
LBT5
Bit 5
R/W
—
—
—
5
0
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
0
0
0
0
0
0
0
0
0
0
LCONF0
LTXDL0
LDATA4
R/W
LBUSY
LFERR
LDIV4
LBT4
Bit 4
4
0
—
—
—
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
LENA
R/W
0
0 R/W
0
0
0
0
0
0
0
0
LENERR LENIDOK LENTXOK LENRXOK
LRXDL3
3
0
LDATA3
LSERR
LDIV11
LAINC
LDIV3
LENA
LERR
LBT3
Bit 3
LID3
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
one
LCMD2
R/W
2
0
0
0 R/W
0
0
0
0
0
0
0
0
LRXDL2
LCMD2
LINDX2
LDATA2
LPERR
LDIV10
LIDOK
LDIV2
LBT2
Bit 2
LID2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
LCMD1
one
R/W
1
0
0
0 R/W
0
0
0
0
0
0
0
0
LRXDL1
LINDX1
LDATA1
LCMD1
LCERR
LTXOK
LDIV1
LDIV9
LBT1
Bit 1
LID1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LCMD0 LINCR
9132D–AUTO–12/10
R
R/W
one
0
0
0
0 R/W
0
0
0
0
0
0
0
0
LRXDL0
LINDX0
LDATA0
LCMD0
LRXOK
LBERR
LDIV0
LDIV8
LBT0
Bit 0
LID0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
one