HW-XGI-VIDEO-US Xilinx Inc, HW-XGI-VIDEO-US Datasheet - Page 27

• Manufacturer Part Number: HW-XGI-VIDEO-US
• Description: DAUGHTER CARD VIDEO I/O VIODC
• Manufacturer: Xilinx Inc

Specifications of HW-XGI-VIDEO-US

• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption
• Other names: 122-1506; HW-XGI-VIDEO-US

Video Input/Output Daughter Card
UG235 (v1.2.1) October 31, 2007
Component Video Output
R
FPGA to ADV7321 Connection
synchronization signals and field indicator.
ADV7403 video decoder device to the XC2VP4 Xilinx FPGA.
Compliant digital video streams are feed into the ADV7321 device by the Xilinx XC2VP4
FPGA, where it is converted to analog RGB or YPrPb using 12-bit DACs. The ADV7321
device, from Analog Devices, produces fully compliant SD/HD analog output signals,
which are then conditioned and drive the RCA type jacks. The Analog Devices ADV7321 is
used to generation all analog component RGB or YPrPb video output signals.
a block diagram of the component video output system on the VIODC board.
The Xilinx XC2VP4 FPGA drives digital video data streams, in either standard and/or
high definition video format, onto three separate 10-bit wide digital input ports of the
ADV7321. For all supported standards the ADV7321 generates all horizontal, vertical and
blanking signals. Six high performance 12-bit digital to analog converters generate the
analog output signals.
Figure 3-4: Connections from ADV7403 Video Decoder to XC2VP4 FGPA
Clock Generation
Virtex-II Pro
XC2VP4
Figure 3-5: Component Video Output Block Diagram
ADV7402 A
www.xilinx.com
GENLOCK
DP[41: 0]
SD/HD Video
HSYNC
VSYNC
ADV7321
Encoder
FIELD
LLC 1
42
LLC 1
FIELD
GENLOCK
DATA
VSYNC
HSYNC
Conditioning
Conditioning
Conditioning
Figure 3-4
Component Video Input and Output
Clock Generation
details the connections from the
XC2VP4
ug235_ch3_06_121905
RCA
RCA
RCA
GRN
BLU
RED
ug235_ch3_07_110805
Component
Analog
Output
Video
Figure 3-5
27
is