MC56F8006DEMO Freescale Semiconductor, MC56F8006DEMO Datasheet - Page 58

DEMO BOARD FOR MC56F8006

MC56F8006DEMO

Manufacturer Part Number
MC56F8006DEMO
Description
DEMO BOARD FOR MC56F8006
Manufacturer
Freescale Semiconductor
Type
DSPr

Specifications of MC56F8006DEMO

Contents
Board
Processor To Be Evaluated
MC56F8006
Interface Type
RS-232, USB
Operating Supply Voltage
3.3 V
Silicon Manufacturer
Freescale
Core Architecture
56800/E
Core Sub-architecture
56800/E
Silicon Core Number
MC56F
Silicon Family Name
MC56F80xx
Rohs Compliant
Yes
For Use With/related Products
MC56F8006
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Specifications
8.13.2
58
1
2
Deviation of slave node clock relative to
Parameters listed are guaranteed by design.
f
(max. 96 MHz) for the 56F8006/56F8002 device.
MAX
Deviation of slave node clock from
Minimum break character length
SCLK (CPOL = 0)
SCLK (CPOL = 1)
the master node clock after
is the frequency of operation of the SCI in MHz, which can be selected system clock (max. 32 MHz) or 3x system clock
nominal clock rate before
RXD pulse width
TXD pulse width
synchronization
synchronization
Characteristic
Serial Communication Interface (SCI) Timing
(Output)
Baud rate
(Input)
(Input)
(Input)
(Input)
MISO
MOSI
SS
2
t
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 3
DV
t
DS
t
Figure 28. SPI Slave Timing (CPHA = 1)
A
F
t
TOL_UNSYNCH
F
ELD
TOL_SYNCH
Symbol
RXD
Slave MSB out
TXD
T
BREAK
MSB in
BR
Table 29. SCI Timing
PW
PW
t
C
LIN Slave Mode
t
t
CH
CL
0.965/BR
0.965/BR
t
DH
Min
–14
t
t
–2
13
11
CH
CL
Bits 14–1
t
Bits 14–1
DV
1
t
F
t
R
(f
1.04/BR
1.04/BR
MAX
Max
14
2
/16)
t
F
t
R
t
DI
Master node
LSB in
Slave node
bit periods
bit periods
Slave LSB out
Mbps
Unit
ns
ns
%
%
Freescale Semiconductor
t
ELG
t
D
See Figure
Figure 29
Figure 30

Related parts for MC56F8006DEMO