ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 980

• Manufacturer Part Number: ATSAM3S-EK
• Description: KIT EVAL FOR ATSAM3S4C
• Manufacturer: Atmel
• Series: SAM3Sr
• Type: MCUr

Specifications of ATSAM3S-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex-M3
• Kit Contents: Board
• Features: TFT Colour LCD Display, SD/MMC Interface
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

39.5.6
39.5.7
39.5.8
39.5.9
39.6
39.6.1
980
980
Functional Description
SAM3S Preliminary
SAM3S Preliminary
Timer Triggers
PWM Event Line
Fault Output
Conversion Performances
Analog-to-digital Conversion
Table 39-3.
Timer Counters may or may not be used as hardware triggers depending on user requirements.
Thus, some or all of the timer counters may be unconnected.
PWM Event Lines may or may not be used as hardware triggers depending on user
requirements.
The ADC Controller has the FAULT output connected to the FAULT input of PWM. Please refer to
Section 39.6.12 ”Fault Output”
For performance and electrical characteristics of the ADC, see the product DC Characteristics
section.
The ADC uses the ADC Clock to perform conversions. Converting a single analog value to a 12-
bit digital data requires Tracking Clock cycles as defined in the field TRACKTIM of the
Mode Register” on page 993
same register. The ADC Clock frequency is selected in the PRESCAL field of the Mode Register
(ADC_MR). The tracking phase starts during the conversion of the previous channel. If the track-
ing time is longer than the conversion time, the tracking phase is extended to the end of the
previous conversion.
The ADC clock range is between MCK/2, if PRESCAL is 0, and MCK/512, if PRESCAL is set to
255 (0xFF). PRESCAL must be programmed in order to provide an ADC clock frequency
according to the parameters given in the product Electrical Characteristics section.
ADC
ADC
ADC
ADC
ADC
ADC
I/O Lines
and Transfer Clock cycles as defined in the field TRANSFER of the
and implementation of the PWM in the product.
AD10
AD11
AD12
AD13
AD14
AD9
PC13
PC15
PC12
PC29
PC30
PA22
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
X1
X1
X1
X1
X1
X1
“ADC