ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 386

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ATSAM3S-EK

Manufacturer Part Number
ATSAM3S-EK
Description
KIT EVAL FOR ATSAM3S4C
Manufacturer
Atmel
Series
SAM3Sr
Type
MCUr
Datasheets

Specifications of ATSAM3S-EK

Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex-M3
Kit Contents
Board
Features
TFT Colour LCD Display, SD/MMC Interface
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S-EK
Manufacturer:
Atmel
Quantity:
135
23.12.2
Figure 23-23. Write Access with NWAIT Assertion in Frozen Mode (EXNW_MODE = 10)
386
internally synchronized
NWAIT signal
SAM3S Preliminary
Frozen Mode
A [23:0]
D[7:0]
NWAIT
NWE
MCK
NCS
6
When the external device asserts the NWAIT signal (active low), and after internal synchroniza-
tion of this signal, the SMC state is frozen, i.e., SMC internal counters are frozen, and all control
signals remain unchanged. When the resynchronized NWAIT signal is deasserted, the SMC
completes the access, resuming the access from the point where it was stopped. See
23. This mode must be selected when the external device uses the NWAIT signal to delay the
access and to freeze the SMC.
The assertion of the NWAIT signal outside the expected period is ignored as illustrated in
23-24.
4
5
4
3
3
2
1
2
EXNW_MODE = 10 (Frozen)
WRITE_MODE = 1 (NWE_controlled)
NWE_PULSE = 5
NCS_WR_PULSE = 7
Write cycle
1
2
FROZEN STATE
1
2
1
2
1
0
0
6500C–ATARM–8-Feb-11
Figure 23-
Figure

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