ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 920

• Manufacturer Part Number: ATSAM3S-EK
• Description: KIT EVAL FOR ATSAM3S4C
• Manufacturer: Atmel
• Series: SAM3Sr
• Type: MCUr

Specifications of ATSAM3S-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex-M3
• Kit Contents: Board
• Features: TFT Colour LCD Display, SD/MMC Interface
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

36.7.39
Name:
Addresses:
Access:
This register can only be written if the bits WPSWS3 and WPHWS3 are cleared in
page
Only the first 16 bits (channel counter size) are significant.
• CPRD: Channel Period
If the waveform is left-aligned, then the output waveform period depends on the channel counter source clock and can be
calculated:
If the waveform is center-aligned, then the output waveform period depends on the channel counter source clock and can
be calculated:
920
911.
– By using the PWM master clock (MCK) divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32,
– By using the PWM master clock (MCK) divided by one of both DIVA or DIVB divider, the formula becomes,
– By using the PWM master clock (MCK) divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32,
– By using the PWM master clock (MCK) divided by one of both DIVA or DIVB divider, the formula becomes,
31
23
15
–
7
64, 128, 256, 512, or 1024). The resulting period formula will be:
respectively:
64, 128, 256, 512, or 1024). The resulting period formula will be:
respectively:
(
------------------------------- -
(
------------------------------------------ -
(
------------------------------------------ -
(
----------------------------------------------------- -
X
CRPD
2
2
SAM3S Preliminary
×
×
PWM Channel Period Register
×
MCK
CPRD
X
CPRD
MCK
MCK
×
MCK
×
CPRD
DIVA
)
×
DIVA
30
22
14
)
)
PWM_CPRDx [x=0..3]
0x4002020C [0], 0x4002022C [1], 0x4002024C [2], 0x4002026C [3]
–
6
Read-write
or
)
(
------------------------------------------ -
or
CRPD
(
----------------------------------------------------- -
2
MCK
×
×
CPRD
DIVB
29
21
13
MCK
–
5
×
)
DIVB
)
28
20
12
–
4
CPRD
CPRD
CPRD
27
19
11
–
3
“PWM Write Protect Status Register” on
26
18
10
–
2
25
17
–
9
1
6500C–ATARM–8-Feb-11
24
16
–
8
0