ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 707
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
ATSAM3S-EK
Manufacturer Part Number
ATSAM3S-EK
Description
KIT EVAL FOR ATSAM3S4C
Manufacturer
Atmel
Series
SAM3Sr
Type
MCUr
Specifications of ATSAM3S-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex-M3
Kit Contents
Board
Features
TFT Colour LCD Display, SD/MMC Interface
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3S-EK
Manufacturer:
Atmel
Quantity:
135
- Current page: 707 of 1118
- Download datasheet (24Mb)
33.7.6
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
RS485 Mode
The USART features the RS485 mode to enable line driver control. While operating in RS485
mode, the USART behaves as though in asynchronous or synchronous mode and configuration
of all the parameters is possible. The difference is that the RTS pin is driven high when the
transmitter is operating. The behavior of the RTS pin is controlled by the TXEMPTY bit. A typical
connection of the USART to a RS485 bus is shown in
Figure 33-36. Typical Connection to a RS485 Bus
The USART is set in RS485 mode by programming the USART_MODE field in the Mode Regis-
ter (US_MR) to the value 0x1.
The RTS pin is at a level inverse to the TXEMPTY bit. Significantly, the RTS pin remains high
when a timeguard is programmed so that the line can remain driven after the last character com-
pletion.
when the timeguard is enabled.
Figure 33-37. Example of RTS Drive with Timeguard
Figure 33-37
Baud Rate
TXEMPTY
US_THR
TXRDY
Clock
Write
TXD
RTS
gives an example of the RTS waveform during a character transmission
USART
Start
Bit
D0
RXD
TXD
RTS
D1
D2
D3
D4
D5
D6
Figure
D7
Parity
SAM3S Preliminary
SAM3S Preliminary
Bit
33-36.
Stop
Bit
Differential
Bus
TG = 4
707
707
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