ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 648
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
ATSAM3S-EK
Manufacturer Part Number
ATSAM3S-EK
Description
KIT EVAL FOR ATSAM3S4C
Manufacturer
Atmel
Series
SAM3Sr
Type
MCUr
Specifications of ATSAM3S-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex-M3
Kit Contents
Board
Features
TFT Colour LCD Display, SD/MMC Interface
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3S-EK
Manufacturer:
Atmel
Quantity:
135
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31.11.5
Name:
Addresses: 0x40018010 (0), 0x4001C010 (1)
Access:
Reset:
TWI_CWGR is only used in Master mode.
• CLDIV: Clock Low Divider
The SCL low period is defined as follows:
• CHDIV: Clock High Divider
The SCL high period is defined as follows:
• CKDIV: Clock Divider
The CKDIV is used to increase both SCL high and low periods.
648
T
T
low
high
=
=
31
23
15
–
7
(
(
(
(
CLDIV
CHDIV
SAM3S Preliminary
TWI Clock Waveform Generator Register
TWI_CWGR
Read-write
0x00000000
×
×
2
2
CKDIV
CKDIV
30
22
14
–
6
)
)
+
+
4 )
4 )
×
×
T
T
MCK
MCK
29
21
13
–
5
28
20
12
–
4
CHDIV
CLDIV
27
19
11
–
3
26
18
10
–
2
CKDIV
25
17
–
9
1
6500C–ATARM–8-Feb-11
24
16
–
8
0
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