C8051F800DK Silicon Laboratories Inc, C8051F800DK Datasheet - Page 231
![KIT DEV C8051F800](/photos/28/94/289400/mcudevkit_sml.jpg)
C8051F800DK
Manufacturer Part Number
C8051F800DK
Description
KIT DEV C8051F800
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F800DK
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F800
Data Bus Width
16 bit
Interface Type
USB
Operating Supply Voltage
7 V to 15 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F8xx
Lead Free Status / Rohs Status
Supplier Unconfirmed
Other names
336-1797
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29.3.3. High-Speed Output Mode
In high-speed output mode, a module’s associated CEXn pin is toggled each time a match occurs between
the PCA Counter and the module's 16-bit capture/compare register (PCA0CPHn and PCA0CPLn). When a
match occurs, the Capture/Compare Flag (CCFn) in PCA0CN is set to logic 1. An interrupt request is gen-
erated if the CCFn interrupt for that module is enabled. The CCFn bit is not automatically cleared by hard-
ware when the CPU vectors to the interrupt service routine, and must be cleared by software. Setting the
TOGn, MATn, and ECOMn bits in the PCA0CPMn register enables the high-speed output mode. If ECOMn
is cleared, the associated pin will retain its state, and not toggle on the next match event.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Cap-
ture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
ENB
ENB
1
PCA
Timebase
Figure 29.6. PCA High-Speed Output Mode Diagram
Enable
P
W
M
1
6
n
x
C
O
M
E
n
PCA0CPLn
PCA0CPMn
C
A
P
P
n
0 0
PCA0L
C
A
P
N
n
16-bit Comparator
M
A
T
n
O
G
T
n
W
M
P
n
0 x
E
C
C
F
n
PCA0CPHn
PCA0H
Rev. 1.0
Match
Toggle
C
F
C
R
TOGn
0
1
PCA0CN
C8051F80x-83x
0
1
CEXn
C
C
F
2
C
C
F
1
C
C
F
0
PCA Interrupt
Crossbar
Port I/O
231
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