C8051F800DK Silicon Laboratories Inc, C8051F800DK Datasheet - Page 13
![KIT DEV C8051F800](/photos/28/94/289400/mcudevkit_sml.jpg)
C8051F800DK
Manufacturer Part Number
C8051F800DK
Description
KIT DEV C8051F800
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F800DK
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F800
Data Bus Width
16 bit
Interface Type
USB
Operating Supply Voltage
7 V to 15 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F8xx
Lead Free Status / Rohs Status
Supplier Unconfirmed
Other names
336-1797
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C8051F80x-83x
SFR Definition 21.2. RSTSRC: Reset Source ............................................................ 128
SFR Definition 22.1. CLKSEL: Clock Select ............................................................... 130
SFR Definition 22.2. OSCICL: Internal H-F Oscillator Calibration .............................. 131
SFR Definition 22.3. OSCICN: Internal H-F Oscillator Control ................................... 132
SFR Definition 22.4. OSCXCN: External Oscillator Control ........................................ 134
SFR Definition 23.1. XBR0: Port I/O Crossbar Register 0 .......................................... 148
SFR Definition 23.2. XBR1: Port I/O Crossbar Register 1 .......................................... 149
SFR Definition 23.3. P0MASK: Port 0 Mask Register ................................................. 151
SFR Definition 23.4. P0MAT: Port 0 Match Register .................................................. 151
SFR Definition 23.5. P1MASK: Port 1 Mask Register ................................................. 152
SFR Definition 23.6. P1MAT: Port 1 Match Register .................................................. 152
SFR Definition 23.7. P0: Port 0 ................................................................................... 153
SFR Definition 23.8. P0MDIN: Port 0 Input Mode ....................................................... 154
SFR Definition 23.9. P0MDOUT: Port 0 Output Mode ................................................ 154
SFR Definition 23.10. P0SKIP: Port 0 Skip ................................................................. 155
SFR Definition 23.11. P1: Port 1 ................................................................................. 155
SFR Definition 23.12. P1MDIN: Port 1 Input Mode ..................................................... 156
SFR Definition 23.13. P1MDOUT: Port 1 Output Mode .............................................. 156
SFR Definition 23.14. P1SKIP: Port 1 Skip ................................................................. 157
SFR Definition 23.15. P2: Port 2 ................................................................................. 157
SFR Definition 23.16. P2MDOUT: Port 2 Output Mode .............................................. 158
SFR Definition 24.1. CRC0CN: CRC0 Control ........................................................... 163
SFR Definition 24.2. CRC0IN: CRC Data Input .......................................................... 164
SFR Definition 24.3. CRC0DATA: CRC Data Output ................................................. 164
SFR Definition 24.4. CRC0AUTO: CRC Automatic Control ........................................ 165
SFR Definition 24.5. CRC0CNT: CRC Automatic Flash Sector Count ....................... 165
SFR Definition 24.6. CRC0FLIP: CRC Bit Flip ............................................................ 166
SFR Definition 25.1. SPI0CFG: SPI0 Configuration ................................................... 174
SFR Definition 25.2. SPI0CN: SPI0 Control ............................................................... 175
SFR Definition 25.3. SPI0CKR: SPI0 Clock Rate ....................................................... 176
SFR Definition 25.4. SPI0DAT: SPI0 Data ................................................................. 176
SFR Definition 26.1. SMB0CF: SMBus Clock/Configuration ...................................... 186
SFR Definition 26.2. SMB0CN: SMBus Control .......................................................... 188
SFR Definition 26.3. SMB0ADR: SMBus Slave Address ............................................ 191
SFR Definition 26.4. SMB0ADM: SMBus Slave Address Mask .................................. 191
SFR Definition 26.5. SMB0DAT: SMBus Data ............................................................ 192
SFR Definition 27.1. SCON0: Serial Port 0 Control .................................................... 206
SFR Definition 27.2. SBUF0: Serial (UART0) Port Data Buffer .................................. 207
SFR Definition 28.1. CKCON: Clock Control .............................................................. 210
SFR Definition 28.2. TCON: Timer Control ................................................................. 215
SFR Definition 28.3. TMOD: Timer Mode ................................................................... 216
SFR Definition 28.4. TL0: Timer 0 Low Byte ............................................................... 217
SFR Definition 28.5. TL1: Timer 1 Low Byte ............................................................... 217
SFR Definition 28.6. TH0: Timer 0 High Byte ............................................................. 218
SFR Definition 28.7. TH1: Timer 1 High Byte ............................................................. 218
Rev. 1.0
13
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