LH28F008SAT-85 Sharp Microelectronics, LH28F008SAT-85 Datasheet - Page 6

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LH28F008SAT-85

Manufacturer Part Number
LH28F008SAT-85
Description
IC FLASH 8MBIT 85NS 40TSOP
Manufacturer
Sharp Microelectronics
Datasheet

Specifications of LH28F008SAT-85

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
8M (1M x 8)
Speed
85ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
40-TSOP
Lead Free Status / RoHS Status
Contains lead / Request inventory verification
Other names
425-1836
LHF08S49

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2. PRODUCT OVERVIEW
The LH28F008SAT-85 is a high-performance 8M-bit
(8,388,608 bit) memory organized as 1M-byte (1,048,576
bytes) of 8 bits each. Sixteen 64K-Byte (65,536 byte)
blocks are included on the LH28F008SAT-85. A memory
map is shown in Figure 4 of this specification. A block erase
operation erases one of the sixteen blocks of memory in
typically 1.6s, independent of the remaining blocks. Each
block can be independently erased and written 100,000
cycles. Erase Suspend mode allows system software to
suspend block erase to read data or execute code from any
other block of the LH28F008SAT-85.
The LH28F008SAT-85 is available in the 40-lead TSOP
(Thin Small Outline Package, 1.2mm thick) package.
Pinouts are shown in Figure 2 of this specification.
The Command User Interface serves as the interface be-
tween the microprocessor or microcontroller and the inter-
nal operation of the LH28F008SAT-85.
Byte Write and Block Erase Automation allow byte write
and block erase operations to be executed using a two-
write command sequence to the Command User Interface.
The internal Write State Machine (WSM) automatically ex-
ecutes the algorithms and timings necessary for byte write
and block erase operations, including verifications, thereby
unburdening the microprocessor or microcontroller. Writing
of memory data is performed in byte increments typically
within 8
10mA typical, 30mA maximum. V
block erase voltage is 11.4V to 12.6V.
The Status Register indicates the status of the WSM and
when the WSM successfully completes the desired byte
write or block erase operation.
The RY/BY# output gives an additional indicator of WSM
activity, providing capability for both hardware signal of sta-
tus (versus software polling) and status masking (interrupt
masking for background erase, for example). Status polling
using RY/BY# minimizes both CPU overhead and system
power consumption. When low, RY/BY# indicates that the
WSM is performing a block erase or byte write operation.
RY/BY# high indicates that the WSM is ready for new com-
mands, block erase is suspended or the device is in deep
powerdown mode.
µ
s. I
PP
byte write and block erase currents are
PP
byte write and
LHF08S49
Maximum access time is 85ns (t
temperature range (0˚C to +70˚C) and over V
age range (4.5V to 5.5V and 4.75V to 5.25V). I
current (CMOS Read) is 20mA typical, 35mA maximum
at 8MHz.
When the CE# and RP# pins are at V
Standby mode is enabled.
A Deep Powerdown mode is enabled when the RP# pin is
at GND, minimizing power consumption and providing write
protection. I
maximum. Reset time of 400ns is required from RP#
switching high until outputs are valid to read attempts.
Equivalently, the device has a wake time of 1µs from RP#
high until writes to the Command User Interface are
recognized by the LH28F008SAT-85. With RP# at GND,
the WSM is reset and the Status Register is cleared.
Please do not execute reprogramming "0" for the bit which
has already been programed "0". Overwrite operation may
generate unerasable bit. In case of reprogramming "0" to
the data which has been programed "1".
For example, changing data from "10111101" to
"10111100" requires "11111110" programming.
•Program "0" for the bit in which you want to change data
•Program "1" for the bit which has already been
from "1" to "0".
programmed "0".
CC
current in deep powerdown is 10
ACC
) over the commercial
CC
, the I
CC
supply volt-
CC
CC
CMOS
active
µ
A
3

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