LH28F008SAT-85 Sharp Microelectronics, LH28F008SAT-85 Datasheet - Page 13

• Manufacturer Part Number: LH28F008SAT-85
• Description: IC FLASH 8MBIT 85NS 40TSOP
• Manufacturer: Sharp Microelectronics

Specifications of LH28F008SAT-85

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 8M (1M x 8)
• Speed: 85ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-TSOP
• Lead Free Status / RoHS Status: Contains lead / Request inventory verification
• Other names: 425-1836; LHF08S49

sharp
Deep Power-Down
The LH28F008SAT-85 offers a deep powerdown feature,
entered when RP# is at V
maximum in deep powerdown mode, with current draw
through V
deselects the memory, places output drivers in a high-
impedence state and turns off all internal circuits. The
LH28F008SAT-85 requires time t
istics-Read-Only Operations) after return from powerdown
until initial memory access outputs are valid. After this
wakeup interval, normal operation is restored. The
Command User Interface is reset to Read Array, and the
upper 5bits of the Status Register are cleared to value
10000, upon return to normal operation.
During block erase or byte write modes, RP# low will abort
either operation. Memory contents of the block being al-
tered are no longer valid as the data will be partially written
or erased. Time t
required before another command can be written.
NOTES:
1. Bus operations are defined in Table 2.
2. IA=Identifier Address: 00H for manufacturer code, 01H for device code.
3. SRD=Data read from Status Register. See Table 4 for a description of the Status Register bits.
4. Following the intelligent identifier command, two read operations access manufacture and device codes.
5. Either 40H or 10H are recognized by the WSM as the Byte Write Setup command.
6. Commands other than those shown above are reserved by SHARP for future device implementations and should not be used.
Read Status Register
Byte Write Setup/Write
Read Array/Reset
Intelligent Identifier
Clear Status Register
Erase Setup/Erase Confirm
Erase Suspend/Erase Resume
Alternate Byte Write Setup/Write
BA=Address within the block being erased.
WA=Address of memory location to be written.
WD=Data to be written at location WA. Data is latched on the rising edge of WE#.
IID=Data read from intelligent identifiers.
PP
Command
maximal 5µA. During read modes, RP#-low
PHWL
after RP# goes to logic-high (V
IL
. Current draw thru V
PHQV
Cycles
Req'd
Bus
(see AC Character-
1
3
2
1
2
2
2
2
Table 3. Command Definitions
Notes
4
5
5
CC
is 10µA
Operation
LHF08S49
IH
) is
Write
Write
Write
Write
Write
Write
Write
Write
First Bus Cycle
Intelligent Identifier Operation
The intelligent identifier operation outputs the manufacturer
c o d e , 8 9 H ; a n d t h e d e v i c e c o d e , A 2 H f o r t h e
LH28F008SAT-85. The system CPU can then automatically
match the device with its proper block erase and byte write
algorithms.
The manufacturer- and device-codes are read via the Com-
mand User Interface. Following a write of 90H to the Com-
mand User Interface, a read from address location 00000H
outputs the manufacturer code (89H). A read from address
00001H outputs the device code (A2H). It is not necessary
to have high voltage applied to V
identifiers from the Command User Interface.
Write
Writes to the Command User Interface enable reading of
device data and intelligent identifiers. They also control in-
spection and clearing of the Status Register. Additionally,
when V
block erasure and byte write. The contents of the interface
register serve as input to the internal state machine.
(1)
Address
PP
WA
WA
BA
X
X
X
X
X
=V
(6)
PPH
(2)
Data
, the Command User Interface controls
FFH
B0H
90H
70H
50H
20H
40H
10H
(3)
Operation
Read
Read
Write
Write
Write
Write
Second Bus Cycle
PP
(1)
to read the intelligent
Address
WA
WA
BA
IA
X
X
(2)
Data
SRD
D0H
D0H
WD
WD
IID
(3)
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