MT46V256M4TG-75:A Micron Technology Inc, MT46V256M4TG-75:A Datasheet - Page 68

IC DDR SDRAM 1GBIT 7.5NS 66TSOP

MT46V256M4TG-75:A

Manufacturer Part Number
MT46V256M4TG-75:A
Description
IC DDR SDRAM 1GBIT 7.5NS 66TSOP
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT46V256M4TG-75:A

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
1G (256M x 4)
Speed
7.5ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Figure 40:
PDF: 09005aef80a2f898/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 1Gb DDR: Rev. I, Core DDR: Rev. B 12/07 EN
Command
Address
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DQS
DQS
DQS
CK#
DM
DM
DM
WRITE-to-READ – Uninterrupting
DQ
DQ
DQ
CK
Notes:
Bank a,
WRITE
Col b
T0
t
t
t
1. DI b = data-in for column b; DO n = data-out for column n.
2. Three subsequent elements of data-in are applied in the programmed order following DI b.
3. An uninterrupted burst of 4 is shown.
4.
5. The READ and WRITE commands are to the same device. However, the READ and WRITE
6. A10 is LOW with the WRITE command (auto precharge is disabled).
DQSS
DQSS
DQSS
t
commands may be to different devices, in which case
command could be applied earlier.
WTR is referenced from the first positive CK edge after the last data-in pair.
DI
b
NOP
T1
DI
b
DI
b
T1n
NOP
T2
68
T2n
T3
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
WTR
Bank a,
READ
Col n
T4
1Gb: x4, x8, x16 DDR SDRAM
t
WTR is not required, and the READ
Transitioning Data
CL = 2
CL = 2
CL = 2
©2003 Micron Technology, Inc. All rights reserved.
T5
NOP
Operations
T6
NOP
Don’t Care
DO
DO
DO
n
n
n
T6n

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