MT46V256M4TG-75:A Micron Technology Inc, MT46V256M4TG-75:A Datasheet - Page 31

• Manufacturer Part Number: MT46V256M4TG-75:A
• Description: IC DDR SDRAM 1GBIT 7.5NS 66TSOP
• Manufacturer: Micron Technology Inc

Specifications of MT46V256M4TG-75:A

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 1G (256M x 4)
• Speed: 7.5ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PDF: 09005aef80a2f898/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 1Gb DDR: Rev. I, Core DDR: Rev. B 12/07 EN
44.
45. During initialization, V
46. The current Micron part operates below 83 MHz (slowest specified JEDEC operating
47. When an input signal is HIGH or LOW, it is defined as a steady state logic HIGH or
48. Random address is changing; 50 percent of data is changing at every transfer.
49. Random address is changing; 100 percent of data is changing at every transfer.
50. CKE must be active (HIGH) during the entire time a REFRESH command is executed.
51. I
52. Whenever the operating frequency is altered, not including jitter, the DLL is required
53. This is the DC voltage supplied at the DRAM and is inclusive of all noise up to 20 MHz.
54. The -6T speed grade will operate with
t
but specify when the device output is no longer driving (
(
Alternatively, V
provided a minimum of 42Ω of series resistance is used between the V
the input pin.
frequency). As such, future die may not reflect this option.
LOW.
That is, from the time the AUTO REFRESH command is registered, CKE must be
active at each rising clock edge, until
I
remain stable. Although I
to be reset followed by 200 clock cycles before any READ command.
Any noise above 20 MHz at the DRAM generated from any source other than that of
the DRAM itself may not exceed the DC voltage range of 2.6V ±100mV.
at any slower frequency.
RPST end point and
DD
DD
t
RPRE).
2N specifies the DQ, DQS, and DM to be driven to a valid HIGH or LOW logic level.
2Q is similar to I
TT
may be 1.35V maximum during power-up, even if V
DD
t
RPRE begin point are not referenced to a specific voltage level
2F except I
DD
DD
Q, V
31
2F, I
TT
DD
, and V
DD
2N, and I
2Q specifies the address and control inputs to
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
Electrical Specifications – DC and AC
RFC has been satisfied.
t
RAS (MIN) = 40ns and
REF
must be equal to or less than V
DD
2Q are similar, I
1Gb: x4, x8, x16 DDR SDRAM
t
RPST) or begins driving
©2003 Micron Technology, Inc. All rights reserved.
t
RAS (MAX) = 120,000ns
DD
2F is “worst case.”
DD
TT
/V
supply and
DD
DD
+ 0.3V.
Q are 0V,