MT46V256M4TG-75:A Micron Technology Inc, MT46V256M4TG-75:A Datasheet - Page 61

IC DDR SDRAM 1GBIT 7.5NS 66TSOP

MT46V256M4TG-75:A

Manufacturer Part Number
MT46V256M4TG-75:A
Description
IC DDR SDRAM 1GBIT 7.5NS 66TSOP
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT46V256M4TG-75:A

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
1G (256M x 4)
Speed
7.5ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Figure 33:
PDF: 09005aef80a2f898/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 1Gb DDR: Rev. I, Core DDR: Rev. B 12/07 EN
x4, x8 Data Output Timing –
Notes:
DQ (first data no longer valid)
DQ (first data no longer valid)
1.
2.
3. DQ transitioning after DQS transition define the
4. For a x4, only two DQ apply.
5.
6. The data valid window is derived for each DQS transitions and is defined as
All DQ and DQS collectively
t
t
transition, and ends with the last valid DQ transition.
T2n are an “early DQS”; at T3, a “nominal DQS”; and at T3n, a “late DQS”.
t
HP is the lesser of
DQSQ is derived at each DQS clock edge, is not cumulative over time, begins with DQS
QH is derived from
DQ (last data valid)
DQ (last data valid)
DQS
DQ 4
DQ 4
DQ 4
DQ 4
DQ 4
DQ 4
CK#
CK
Earliest signal transition
3
6
Latest signal transition
T1
t
t
DQSQ,
CL or
t
HP:
t HP 1
t
t
QH =
CH clock transition collectively when a bank is active.
t
61
QH, and Data Valid Window
t
HP -
t HP 1
t DQSQ 2
t QH 5
t
QHS.
T2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
window
Data
valid
T2
T2
T2
t HP 1
T2n
t DQSQ 2
t QH 5
t
DQSQ window. DQS transitions at T2 and
1Gb: x4, x8, x16 DDR SDRAM
window
t HP 1
T2n
T2n
T2n
Data
valid
T3
t DQSQ 2
t QH 5
©2003 Micron Technology, Inc. All rights reserved.
t HP 1
window
Data
valid
T3
T3
T3
T3n
t DQSQ 2
t QH 5
t HP 1
Operations
t
QH -
T4
window
T3n
T3n
Data
valid
T3n
t
DQSQ.

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