MT46V256M4TG-75:A Micron Technology Inc, MT46V256M4TG-75:A Datasheet - Page 60
![IC DDR SDRAM 1GBIT 7.5NS 66TSOP](/photos/7/22/72288/mfg557-66-tsop_sml.jpg)
MT46V256M4TG-75:A
Manufacturer Part Number
MT46V256M4TG-75:A
Description
IC DDR SDRAM 1GBIT 7.5NS 66TSOP
Manufacturer
Micron Technology Inc
Datasheet
1.MT46V256M4P-6TA_TR.pdf
(82 pages)
Specifications of MT46V256M4TG-75:A
Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
1G (256M x 4)
Speed
7.5ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Figure 32:
PDF: 09005aef80a2f898/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 1Gb DDR: Rev. I, Core DDR: Rev. B 12/07 EN
Command
BA0, BA1
Case 1:
Case 2:
Address
DQS
DQS
CK#
CKE
A10
DM
DQ
DQ
CK
t
t
AC (MIN) and
AC (MAX) and
Bank READ – Without Auto Precharge
Notes:
t
t
IS
NOP
IS
T0
t
1
t
IH
t
IH
DQSCK (MIN)
t
DQSCK (MAX)
1. NOP commands are shown for ease of illustration; other commands may be valid at these
2. BL = 4.
3. The PRECHARGE command can only be applied at T5 if
4. Disable auto precharge.
5. “Don’t Care” if A10 is HIGH at T5.
6. DO n (or b) = data-out from column n (or column b); subsequent elements are provided in
7. Refer to Figure 33 on page 61, Figure 34 on page 62, and Figure 35 on page 63 for detailed
times.
the programmed order.
DQS and DQ timing.
t
Bank x
t
IS
IS
Row
Row
ACT
T1
t
t
IH
IH
t
CK
t
t RAS 3
t
RCD
RC
NOP
T2
1
t
CH
t
CL
t
Bank x
READ
4
Col n
IS
T3
t
2
t
IH
LZ (MIN)
60
CL = 2
NOP
T4
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1
RPRE
t
LZ (MIN)
t
RPRE
One bank
All banks
Bank x
PRE
T5
t
3
DQSCK (MIN)
DO
t
DQSCK (MAX)
1Gb: x4, x8, x16 DDR SDRAM
n
5
t
AC (MIN)
DO
t
n
AC (MAX)
T5n
t
RAS (MIN) is met.
t
RP
NOP
T6
1
©2003 Micron Technology, Inc. All rights reserved.
Transitioning Data
t
HZ (MAX)
T6n
t
RPST
t
RPST
NOP
T7
1
Operations
Bank x
Don’t Care
Row
Row
ACT
T8
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