LFE2M50E-PS-EVN Lattice, LFE2M50E-PS-EVN Datasheet - Page 37

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LFE2M50E-PS-EVN

Manufacturer Part Number
LFE2M50E-PS-EVN
Description
Programmable Logic IC Development Tools LatticeECP2M PCI Express Dev Kit
Manufacturer
Lattice
Datasheet

Specifications of LFE2M50E-PS-EVN

Rohs
yes
Tool Is For Evaluation Of
LatticeECP2M-50
Factory Pack Quantity
1
Running the PCI Express Basic Demo
LatticeECP2M PCI Express Development Kit User’s Guide
The following table provides descriptions of all of the Counter page features.
Table 7: Counter Page Features
Feature
START/STOP
Current Count
Reload Value
DIP Switch
Get button
9. Finally, click on the Rd/Wr tab to open the Read/Write page. The Read/
Table 8: Read/Write Page Features
Feature
Memory Space
Data Size
Memory Contents
READ
WRITE
Write page is used for looking at and poking at registers and EBR memory
values in the application IP. Refer to Figure 8, "PCIe Basic Demo Read/
Write Page" on page 30.
The Read/Writer is primarily used for debugging and diagnosing the
application IP registers. The following table provides descriptions of all of
the Read/Write page features.
Data accesses can be specified as byte, short or word operations by
selecting the Data Size. Access is done to the selected Base Address
Register (BAR). The memory contents are displayed in the window. In the
address, the upper nibble (31:28) specifies the BAR being accessed. The
following example shows reading the EBR memory (BAR 1, starting at
offset 0x1000) in the application IP and displaying them in word format.
Data can be written to registers using the WRITE button. Specify the BAR
Offset to start writing at and the hex data in the Data field. Separate each
Description
Indicates the base address register (BAR) memory space
to access.
Indicates bit size. Options are 8-bit, 16-bit, and 32-bit.
Displays memory contents.
Starts a read data access based on offset and length
settings.
Starts a write data access based on offset and data
settings.
Description
Starts and stops the 32-bit down counter in the FPGA
hardware.
Displays the current count value.
Sets the number from which counting begins.
The DIP switch section shows that user changes to the
switches on the solutions board are seen by the
application software on the PC. The GUI polls the DIP
switch register 10 times per second and displays the
value read from the 8-bit DIP switch register.
Used to immediately update the value. This is active if
No Polling was selected from the Settings dropdown
menu.
Touring the PCIe Basic Demo Interface
29

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