LFE2M50E-PS-EVN Lattice, LFE2M50E-PS-EVN Datasheet - Page 36

• Manufacturer Part Number: LFE2M50E-PS-EVN
• Description: Programmable Logic IC Development Tools LatticeECP2M PCI Express Dev Kit
• Manufacturer: Lattice

Specifications of LFE2M50E-PS-EVN

• Rohs: yes
• Tool Is For Evaluation Of: LatticeECP2M-50
• Factory Pack Quantity: 1

Running the PCI Express Basic Demo
LatticeECP2M PCI Express Development Kit User’s Guide
Figure 7: PCIe Basic Demo Counter Page
Table 6: Memory Page Features
Feature
LOAD
SAVE
8. Next click on the Counter tab to open the Counter page. The Counter
page allows you to control a 32-bit down counter in the FPGA hardware.
The page is illustrated in Figure 7 below. Table 7, "Counter Page
Features" on page 29 provides descriptions of the page’s features.
The counter is driven by the 125 MHz clock that feeds the IP. The counter
is started by selecting the Start radio button. Counting begins from the
value entered into the Reload Value field. The current count value is
displayed in the Current Count field.
Description
Loads 16KB of binary data from the file specified (or as
much data as is in the file) into EBR memory, starting at
location 0. This can be used to load a known pattern into
the EBR memory by using a file created by another tool.
Writes all 16KB of EBR memory to the file specified.
This can be used to save the contents of EBR memory
for off-line processing (i.e., to verify that the pattern
loaded in with LOAD is correctly saved in the EBR).
Touring the PCIe Basic Demo Interface
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