DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 69

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

9.9.5 T1 Data Link
9.9.5.1 T1 Transmit Bit-Oriented Code (BOC) Transmit Controller
The DS26519 contains a BOC generator on the transmit side and a BOC detector on the receive side. The BOC
function is available only in T1 mode.
Table 9-19. Registers Related to T1 Transmit BOC
Transmit BOC Register (T1TBOC)
Transmit HDLC Control Register 2 (THC2)
Transmit Control Register 1(TCR1)
Note: The addresses shown above are for Framer 1.
Bits 0 to 5 in the
causes the transmit BOC controller to immediately begin inserting the BOC sequence into the FDL bit position. The
transmit BOC controller automatically provides the abort sequence. BOC messages will be transmitted as long as
SBOC is set. Note that the TFPT (TCR1.6) control bit must be set to zero for the BOC message to overwrite F-bit
information being sampled on TSERn.
9.9.5.1.1 To Transmit a BOC
9.9.5.2 Receive Bit-Oriented Code (BOC) Controller
The DS26528 framers contain a BOC generator on the transmit side and a BOC detector on the receive side. The
BOC function is available only in T1, ESF mode in the data link bits.
receive BOC operation.
Table 9-20. Registers Related to T1 Receive BOC
Receive BOC Control Register
(T1RBOCC)
Receive BOC Register (T1RBOC)
Receive Latched Status Register 7(RLS7)
Receive Interrupt Mask Register 7 (RIM7)
Note: The addresses shown above are for Framer 1.
In ESF mode, the DS26519 continuously monitors the receive message bits for a valid BOC message. The BOC
detect (BD) status bit at RLS7.0 will be set once a valid message has been detected for time determined by the
receive BOC filter bits RBF0 and RBF1 in the
RBOC register. Once the user has cleared the BD bit, it will remain clear until a new BOC is detected (or the same
BOC is detected following a BOC clear event). The BOC clear (BC) bit at RLS7.1 is set when a valid BOC is no
longer being detected for a time determined by the receive BOC disintegration bits RBD0 and RBD1 in the
T1RBOCC
The BD and BC status bits can create a hardware interrupt on the INTB signal as enabled by the associated
interrupt mask bits in the
1) Write 6-bit code into the
2) Set SBOC bit in
register.
REGISTER
REGISTER
T1TBOC
THC2
RIM7
register contain the BOC message to be transmitted. Setting SBOC = 1 (THC2.6)
= 1.
register.
T1TBOC
Table 9-19
register.
T1RBOCC
ADDRESSES
ADDRESSES
FRAMER 1
shows the registers related to the transmit bit-oriented code.
FRAMER 1
015h
063h
096h
0A6h
163h
113h
181h
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register. The 6-bit BOC message will be available in the
Transmit bit-oriented message code register.
Bit to enable sending of transmit BOC.
Determines the sourcing of the F-bit.
Controls the receive BOC function.
Receive bit-oriented message.
Indicates changes to the receive bit-oriented
messages.
Mask bits for RBOC for generation of
interrupts.
Table 9-20
DS26519 16-Port T1/E1/J1 Transceiver
shows the registers related to the
FUNCTION
FUNCTION