DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 179

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: This register has an alternate definition for E1 mode. See E1RCR2.
Bits 5 to 3: Receive Up Code Length Definition Bits (RUP[2:0])
Bits 2 to 0: Receive Down Code Length Definition Bits (RDN[2:0])
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: This register has an alternate definition for T1 mode. See T1RIBCC.
Bit 0: Receive Loss of Signal Alternate Criteria (RLOSA). Defines the criteria for a loss of signal condition.
RUP2
RDN2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0 = LOS declared upon 255 consecutive zeros (125 μ s).
1 = LOS declared upon 2048 consecutive zeros (1ms).
RUP1
RDN1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
—
—
7
0
7
0
RUP0
RDN0
T1RIBCC (T1 Mode)
Receive In-Band Code Control Register
082h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
E1RCR2 (E1 Mode)
Receive Control Register 2
082h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
—
—
6
0
6
0
RUP2
—
5
0
5
0
LENGTH SELECTED
LENGTH SELECTED
8 : 16 bits
8 : 16 bits
1 bits
2 bits
3 bits
4 bits
5 bits
6 bits
7 bits
1 bits
2 bits
3 bits
4 bits
5 bits
6 bits
7 bits
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RUP1
—
4
0
4
0
RUP0
—
3
0
3
0
DS26519 16-Port T1/E1/J1 Transceiver
RDN2
—
2
0
2
0
RDN1
—
1
0
1
0
RLOSA
RDN0
0
0
0
0