DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 213

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

Register Name:
Register Description:
Register Address:
Bit #
Name
Bits 7 to 0: BERT Port Channel Select Receive Channels 1 to 32 (CH[1:32])
0 = Do not enable the receive BERT clock for the associated channel time, or map the selected channel
data out of the receive BERT port.
1 = Enable receive BERT clock for the associated channel time, and allow mapping of the selected
channel data out of the receive BERT port. Multiple or all channels may be selected simultaneously.
(MSB)
CH16
CH24
CH32
CH8
7
CH15
CH23
CH31
CH7
RBPCS1, RBPCS2, RBPCS3, RBPCS4
Receive BERT Port Channel Select Registers 1 to 4
0D4h, 0D5h, 0D6h, 0D7h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
6
CH14
CH22
CH30
CH6
5
CH13
CH21
CH29
CH5
4
213 of 310
CH12
CH20
CH28
CH4
3
CH11
CH19
CH27
CH3
2
DS26519 16-Port T1/E1/J1 Transceiver
CH10
CH18
CH26
CH2
1
(LSB)
CH17
CH25
CH1
CH9
0
RBPCS1
RBPCS2
RBPCS3
RBPCS4 (E1
Mode Only)