DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 182
DS26519GA2
Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26519GA2.pdf
(310 pages)
Specifications of DS26519GA2
Part # Aliases
90-26519-0A2
- Current page: 182 of 310
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: RCLKn Invert (RCLKINV)
Bit 6: RSYNCn Invert (RSYNCINV)
Bit 5: H.100 Sync Mode (H100EN). See Section
Bit 4: RSYSCLKn Mode Select (RSCLKM)
Bit 3: RSYNCn Multiframe Skip Control (RSMS) (T1 Mode Only). Useful in framing format conversions from D4
to ESF. This function is not available when the receive-side elastic store is enabled. RSYNCn must be set to output
multiframe pulses.
Bit 2: RSYNCn I/O Select (RSIO). (Note: This bit must be set to zero when elastic store is disabled.) The default
value for this bit is a logic 1 so that the default state of RSYNCn is as an input.
Bit 1: RSYNCn Mode Select 2 (RSMS2)
In E1 mode, RSMS2 also selects which multiframe signal is available at the RMSYNCn pin, regardless of the
configuration for RSYNCn. When RSMS2 = 0, RMSYNCn outputs CAS multiframe boundaries; when RSMS2 = 1,
RMSYNCn outputs CRC-4 multiframe boundaries.
Bit 0: RSYNC Mode Select 1 (RSMS1). Selects frame or multiframe pulse when RSYNCn pin is in output mode. In
input mode (elastic store must be enabled) multiframe mode is only useful when receive signaling reinsertion is
enabled.
0 = No inversion.
1 = Invert RCLKn.
0 = No inversion.
1 = Invert RSYNCn as either input or output.
0 = Normal operation.
1 = RSYNCn and TSSYNCIOn signals are shifted.
0 = If RSYSCLKn is 1.544MHz.
1 = If RSYSCLKn is 2.048MHz or IBO enabled.
0 = RSYNCn will output a pulse at every multiframe.
1 = RSYNCn will output a pulse at every other multiframe.
0 = RSYNCn is an output.
1 = RSYNCn is an input (only valid if elastic store enabled).
T1: RSYNCn pin must be programmed in the output frame mode.
0 = do not pulse double wide in signaling frames.
1 = do pulse double wide in signaling frames.
E1: RSYNCn pin must be programmed in the output multiframe mode.
0 = RSYNCn outputs CAS multiframe boundaries.
1 = RSYNCn outputs CRC-4 multiframe boundaries.
0 = Frame mode.
1 = Multiframe mode.
RCLKINV
RCLKINV
7
0
RSYNCINV
RSYNCINV
RIOCR
Receive I/O Configuration Register
084h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
6
0
H100EN
H100EN
5
0
9.8.3
RSCLKM
RSCLKM
182 of 310
4
0
for more information.
RSMS
—
3
0
DS26519 16-Port T1/E1/J1 Transceiver
RSIO
RSIO
2
1
RSMS2
RSMS2
1
0
RSMS1
RSMS1
0
0
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