LFE2-6E-7T144C Lattice, LFE2-6E-7T144C Datasheet - Page 61

• Manufacturer Part Number: LFE2-6E-7T144C
• Description: FPGA - Field Programmable Gate Array 6K LUTs 90 I/O DSP 1.2V -7
• Manufacturer: Lattice

Specifications of LFE2-6E-7T144C

• Number Of I/os: 90
• Maximum Operating Frequency: 420 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-144
• Minimum Operating Temperature: 0 C
• Factory Pack Quantity: 300

Lattice Semiconductor
Register-to-Register Performance (Continued)
Derating Timing Tables
Logic timing provided in the following sections of this data sheet and the ispLEVER design tools are worst case
numbers in the operating range. Actual delays at nominal temperature and voltage for best case process, can be
much better than the values given in the tables. The ispLEVER design tool can provide logic timing numbers at a
particular temperature and voltage.
36x36 Multiply (All Registers)
18x18 Multiply/Accumulate (Input and
Output Registers)
18x18 Multiply-Add/Sub-Sum (All Regis-
ters)
DSP IP Functions
16-Tap Fully-Parallel FIR Filter
1024-pt, Radix 4, Decimation in
Frequency FFT
8X8 Matrix Multiplication
1. These timing numbers were generated using the ispLEVER design tool. Exact performance may vary with device, design and tool version.
Timing v. A0.01
The tool uses internal parameters that have been characterized but are not tested on every device.
Function
-7 Timing
3-14
TBA
TBA
TBA
TBA
422
479
DC and Switching Characteristics
LatticeECP2 Family Data Sheet
Units
MHz
MHz
MHz
MHz
MHz
MHz