ATMEGA16-16AU SL602 Atmel, ATMEGA16-16AU SL602 Datasheet - Page 110

• Manufacturer Part Number: ATMEGA16-16AU SL602
• Manufacturer: Atmel

16-bit
Timer/Counter
Register
Description
Timer/Counter1
Control Register A –
TCCR1A
2466T–AVR–07/10
• Bit 7:6 – COM1A1:0: Compare Output Mode for Channel A
• Bit 5:4 – COM1B1:0: Compare Output Mode for Channel B
The COM1A1:0 and COM1B1:0 control the Output Compare pins (OC1A and OC1B respec-
tively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A output
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COM1B1:0 bit are written to one, the OC1B output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OC1A or OC1B pin must be set in order to enable the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is depen-
dent of the WGM13:0 bits setting.
WGM13:0 bits are set to a normal or a CTC mode (non-PWM).
Table 44. Compare Output Mode, non-PWM
Table 45
mode.
Bit
Read/Write
Initial Value
COM1A1/COM1B1
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the fast PWM
0
0
1
1
COM1A1
R/W
7
0
COM1A0
R/W
COM1A0/COM1B0
6
0
COM1B1
R/W
0
1
0
1
5
0
Table 44
COM1B0
R/W
4
0
Description
Normal port operation, OC1A/OC1B
disconnected.
Toggle OC1A/OC1B on compare match
Clear OC1A/OC1B on compare match (Set
output to low level)
Set OC1A/OC1B on compare match (Set
output to high level)
shows the COM1x1:0 bit functionality when the
FOC1A
W
3
0
FOC1B
W
2
0
WGM11
R/W
1
0
ATmega16(L)
WGM10
R/W
0
0
TCCR1A
110