ATAM894R-TNSY Atmel, ATAM894R-TNSY Datasheet - Page 78
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ATAM894R-TNSY
Manufacturer Part Number
ATAM894R-TNSY
Description
flash, Microcontrollers, Microprocessors, Semiconductors and Actives, ic, mcu
Manufacturer
Atmel
Datasheet
1.ATAM894R-TNSY.pdf
(97 pages)
- Current page: 78 of 97
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78
ATAM894
Combination Mode 9: Bi-phase Demodulation
SSI mode 1:
Timer 3 mode 11:
In the Bi-phase demodulation mode the timer works like in the Manchester demodulation mode.
The difference is that the bits are decoded with the toggle flip-flop. This flip-flop samples the
edge in the middle of the bit-frame and the compare register 1 match event shifts the toggle flip-
flop output into shift register. Before activating the demodulation the timer and the demodulation
stage must be synchronized with the bit-stream. The Bi-phase code timing consists of parts with
the half bit-length and the complete bit-length. The synchronization routine must start the
demodulator after an interval with the complete bit-length.
The counter can be driven by any internal clock source and the output T3O can be used by
Timer 2 in this mode.
Figure 6-58. Bi-phase Demodulation
CM31 = SCI
Counter 3
SR-DATA
Q1 = SI
Timer 3
Reset
mode
T3EX
T3I
Synchronize
8-bit shift register internal data input (SI) and the internal shift clock
(SCI) from the Timer 3
Bi-phase demodulation with Timer 3
0
0
Bit 7
0
1
Bit 6
1
1
Bi-phase demodulation mode
Bit 5
1
0
Bit 4
0
1
Bit 3
1
0
Bit 2
0
1
Bit 1
4679D–4BMCU–05/05
1
0
Bit 0
0
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