ATAM894R-TNSY Atmel, ATAM894R-TNSY Datasheet - Page 34
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ATAM894R-TNSY
Manufacturer Part Number
ATAM894R-TNSY
Description
flash, Microcontrollers, Microprocessors, Semiconductors and Actives, ic, mcu
Manufacturer
Atmel
Datasheet
1.ATAM894R-TNSY.pdf
(97 pages)
- Current page: 34 of 97
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6.3.1.2
6.3.1.3
34
ATAM894
Timer 1 Control Register 2 (T1C2)
Watchdog Control Register (WDC)
Table 6-6.
Note:
Note:
T1C2
T1C2
T1BP
T1CS
T1IM
WDC
WDL
WDR
WDT1
WDT0
0
0
0
0
1
1
1
1
1. Bit 3 = MSB, Bit 0 = LSB
1. Bit 3 = MSB, Bit 0 = LSB
T1C1
0
0
1
1
0
0
1
1
WatchDog Lock mode
WDL = 1, the watchdog can be enabled and disabled by using the WDR bit
WDL = 0, the watchdog is enabled and locked. In this mode the WDR bit has no
WatchDog Run and stop mode
WDR = 1, the watchdog is stopped/disabled
WDR = 0, the watchdog is active/enabled
WatchDog Time 1
WatchDog Time 0
Bit 3
WDL
Bit 3
–
Timer 1 SUBCL ByPassed
T1BP = 1, TIOUT = T1MUX
T1BP = 0, T1OUT = SUBCL
Timer 1 input Clock Select
T1CS = 1, CL1 = SUBCL (see
T1CS = 0, CL1 = SYSCL (see
Timer 1 Interrupt Mask
T1IM = 1, disables Timer 1 interrupt
T1IM = 0, enables Timer 1 interrupt
Timer 1 Control Bits
(1)
T1C0
(1)
0
1
0
1
0
1
0
1
effect. After the WDL bit is cleared, the watchdog is active until a system
reset or power-on reset occurs
Bit 2
WDR
Bit 2
T1BP
Divider
16384
2048
256
16
32
2
4
8
Bit 1
WDT1
Bit 1
T1CS
Time Interval with
SUBCL/16384
SUBCL/2048
SUBCL/256
SUBCL/16
SUBCL/32
SUBCL/2
SUBCL/4
SUBCL/8
SUBCL
Bit 0
WDT0
Figure 6-8 on page
Figure 6-8 on page
Bit 0
T1IM
Address: '7'hex — Subaddress: 'A'hex
Reset value: 1111b
Address: '7'hex — Subaddress: '9'hex
Reset value: x111b
Time Interval with
SUBCL = 32 kHz
32)
32)
0.977 ms
7.812 ms
62.5 ms
500 ms
122 µs
244 µs
488 µs
61 µs
Time Interval with
SYSCL = 2/1 MHz
8192 µs/16384 µs
1024 µs/2048 µs
128 µs/256 µs
4679D–4BMCU–05/05
16 µs/32 µs
8 µs/16 µs
1 µs/2 µs
2 µs/4 µs
4 µs/8 µs
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