ATAM894R-TNSY Atmel, ATAM894R-TNSY Datasheet - Page 49
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ATAM894R-TNSY
Manufacturer Part Number
ATAM894R-TNSY
Description
flash, Microcontrollers, Microprocessors, Semiconductors and Actives, ic, mcu
Manufacturer
Atmel
Datasheet
1.ATAM894R-TNSY.pdf
(97 pages)
- Current page: 49 of 97
- Download datasheet (2Mb)
4679D–4BMCU–05/05
Most of the timer modes use their compare registers alternately. After the start has been acti-
vated, the first comparison is carried out via the compare register 1, the second is carried out via
the compare register 2, the third is carried out again via the compare register 1 and so on. This
makes it easy to generate signals with constant periods and variable duty cycle or to generate
signals with variable pulse and space widths.
If single-action mode is set for one compare register, the comparison is always carried out after
the first cycle via the other compare register.
The counter can be started and stopped via the control register T3C. This register also controls
the initial level of the output before start. T3C contains the interrupt mask for a T3I input
interrupt.
Via the Timer 3 clock-select register, the internal or external clock source can be selected. This
register selects also the active edge of the external input. An edge at the external input T3I can
generate also an interrupt if the T3EIM bit is set and the Timer 3 is stopped (T3R = 0) in the T3C
register.
The status of the timer as well as the occurrence of a compare match or an edge detect of the
input signal is indicated by the status register T2ST. This allows identification of the interrupt
source because all these events share only one timer interrupt.
Timer 3 compares data values.
The Timer 3 has two 8-bit compare registers (T3CO1, T3CO2). The compare data value can be
‘m’ for each of the Timer 3 compare registers.
The compare data value for the compare registers is: m = x +1
Timer 3 – Mode 1: Timer/Counter
The selected clock from an internal or external source increments the 8-bit counter. In this mode,
the timer can be used as event counter for external clocks at T3I or as timer for generating inter-
rupts and pulses at T3O. The counter value can be read by the software via the capture register.
Figure 6-26. Counter Reset with Each Compare Match
Counter 3
CM31
CM32
INT5
T3O
T3R
0
0
0
1
2
3
0
1
2
3
4
5
0
1
0 x 255
2
3
0
ATAM894
1
2
3
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