ATAM894R-TNSY Atmel, ATAM894R-TNSY Datasheet - Page 76
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ATAM894R-TNSY
Manufacturer Part Number
ATAM894R-TNSY
Description
flash, Microcontrollers, Microprocessors, Semiconductors and Actives, ic, mcu
Manufacturer
Atmel
Datasheet
1.ATAM894R-TNSY.pdf
(97 pages)
- Current page: 76 of 97
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76
ATAM894
Figure 6-55. FSK Modulation
Combination Mode 7: Pulse-width Modulation (PWM)
SSI mode 1:
Timer 3 mode 9:
The two compare registers are used to generate two varied time intervals. The SSI data output
selects which compare register is used for the output pulse generation. In this mode, both com-
pare and compare mode registers must be programmed to generate the two pulse width. It is
also useful to enable the single-action mode for extreme duty cycles. Timer 2 is used as baud-
rate generator and for the triggered restart of Timer 3. The SSI must be supplied with the toggle
signal of Timer 2. The counter is driven by an internal or external clock source.
Figure 6-56. Pulse-width Modulation
Counter 3
Counter 3
TOG2
CM31
CM32
CM32
SCO
CM31
T3O
T3R
SIR
SO
T3O
T3R
SO
0 0 0 0 0 0 0 0 0
0 1 2 3 4 0 1 2 3 4 0 1 2 3
8-bit shift register internal data output (SO) to the Timer 3
Pulse-width modulation with the shift register data (SO)
0
0
0 0 0 0
0
0 0 0 0 0 1 2 3 4 5 6 7 8 9101112 131415 0 1 2 3 4 5
4 0 1 2 0 1 2 0 1 2 0 1 2 0 1 2 0 1 2 0 1 2 0 1 2 3
1
1
6 7 8
0
9
10
1112
13
4679D–4BMCU–05/05
14
15
0
0
4 0
1
2 3
1
1
4
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