ATAM894R-TNSY Atmel, ATAM894R-TNSY Datasheet - Page 3
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ATAM894R-TNSY
Manufacturer Part Number
ATAM894R-TNSY
Description
flash, Microcontrollers, Microprocessors, Semiconductors and Actives, ic, mcu
Manufacturer
Atmel
Datasheet
1.ATAM894R-TNSY.pdf
(97 pages)
- Current page: 3 of 97
- Download datasheet (2Mb)
Table 2-1.
3. Introduction
4. Differences Between ATAM894 and ATARx90/x92
4.1
4.2
4.3
4679D–4BMCU–05/05
Pin
19
20
21
22
23
24
Program Memory
Configuration Memory
Data Memory
Symbol
BP41
BP42
BP43
VSS
NC
NC
Pin Description (Continued)
Type
I/O
I/O
I/O
–
–
–
The ATAM894 is a member of Atmel’s family of 4-bit single-chip microcontrollers. Instead of
ROM it contains EEPROM, RAM, parallel I/O ports, two 8-bit programmable multifunction
timer/counters, voltage supervisor, interval timer with watchdog function and a sophisticated
on-chip clock generation with integrated RC-, 32-kHz and 4-MHz crystal oscillators.
The program memory of the MTP device is realized as an EEPROM. The memory size for user
programs is 8192 bytes. It is programmed as 258
LOCK bit function is user selectable and protects the device from unauthorized read out of the
program memory.
An additional area of 64 bytes of the EEPROM is used to store information about the hardware
configuration. All the options that are selectable for the ROM versions are available to the user.
This includes not only the different port options but also the possibilities to select different capac-
itors for OSC1 and OSC2, the option to enable or disable the hardlock for the watchdog, the
option to select OSC2 instead of OSC1 as external clock input and the option to enable the
external clock monitor as a reset source. Activating the options is performed by the reset cir-
cuitry. Reset starts a download sequence to transfer the information from the memory into a shift
register (configuration register).
The ATAM894 contains an internal data EEPROM that is organized as two pages of 32
If it is necessary to be compatible with the ROM parts, only one page must be used with the
flash part. Also for compatibility reasons the access to the EEPROM is handled via the MCL
(serial interface) as in the corresponding ROM parts. A behavioral difference that only needs to
be considered for error handling can be seen, when the communication via the MCL is not termi-
nated correctly. A missing STOP condition leads to a significantly higher current consumption for
the ROM parts compared to the flash parts. A slightly different concept for the read amplifiers of
the memory makes the flash part more tolerant in terms of communication errors.
Function
Bi-directional I/O line of Port 4.1
Bi-directional I/O line of Port 4.2 T2O Timer 2 output
Bi-directional I/O line of Port 4.3 SD serial data I/O or INT3 external interrupt input
Circuit ground
Not connected
Not connected
Alternate Function
VMI voltage monitor input or T2I external clock input
Timer 2
–
–
–
32-byte blocks of data. The implemented
ATAM894
Reset State
Input
Input
Input
Input
–
–
16 bit.
3
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