ATAM894R-TNSY Atmel, ATAM894R-TNSY Datasheet - Page 44
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ATAM894R-TNSY
Manufacturer Part Number
ATAM894R-TNSY
Description
flash, Microcontrollers, Microprocessors, Semiconductors and Actives, ic, mcu
Manufacturer
Atmel
Datasheet
1.ATAM894R-TNSY.pdf
(97 pages)
- Current page: 44 of 97
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6.3.2.8
44
ATAM894
Duty Cycle Generator
Table 6-9.
Table 6-10.
The duty cycle generator generates duty cycles of 25%, 33% or 50%. The frequency at the duty
cycle generator output depends on the duty cycle and the Timer 2 prescaler setting. The
DCG-stage can also be used as an additional programmable prescaler for Timer 2.
Figure 6-23. DCG Output Signals
Mode
T2D1
1
2
3
4
1
1
0
0
DCGO0
DCGO1
DCGO2
DCGO3
DCGIN
T2MS1
T2D0
1
1
0
0
Timer 2 Duty Cycle Bits
Timer 2 Mode Select Bits
1
0
1
0
T2MS0
Function of Duty Cycle Generator (DCG)
Bypassed (DCGO0)
Duty cycle 1/1 (DCGO1)
Duty cycle 1/2 (DCGO2)
Duty cycle 1/3 (DCG03)
1
0
1
0
Clock Output (POUT)
4-bit counter overflow (OVF1)
4-bit compare output (CM1)
4-bit compare output (CM1)
4-bit compare output (CM1)
Timer 2 Modes
12-bit compare counter, the DCG
have to be bypassed in this mode
8-bit compare counter with 4-bit
programmable prescaler and duty
cycle generator
8-bit compare counter clocked by
SYSCL or the external clock input
T2I, 4-bit prescaler run, the
counter 2/1 starts after writing
mode 3
8-bit compare counter clocked by
SYSCL or the external clock input
T2I, 4-bit prescaler stop and
resets
Additional Divider Effect
4679D–4BMCU–05/05
/1
/2
/3
/4
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