ATAM894R-TNSY Atmel, ATAM894R-TNSY Datasheet - Page 46
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ATAM894R-TNSY
Manufacturer Part Number
ATAM894R-TNSY
Description
flash, Microcontrollers, Microprocessors, Semiconductors and Actives, ic, mcu
Manufacturer
Atmel
Datasheet
1.ATAM894R-TNSY.pdf
(97 pages)
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6.3.2.11
6.3.2.12
6.3.2.13
46
ATAM894
Timer 2 Compare Mode Register (T2CM)
Timer 2 COmpare Register 1 (T2CO1)
Timer 2 COmpare Register 2 (T2CO2) Byte Write
Table 6-12.
In prescaler mode the clock is bypassed if the compare register T2CO1 contains 0.
T2CM
T2OTM
T2CTM
T2RM
T2IM
T2CO1
T2CO2
Timer 2 Output Mode
1, 2, 3, 4, 5 and 6
1, 2, 3, 4, 5 and 6
Bit 3
T2OTM
Write cycle
First write cycle
Second write
cycle
Timer 2 Overflow Toggle Mask bit
T2OTM = 0, disable overflow toggle
T2OTM = 1, enable overflow toggle, a counter overflow (OVF2) toggles output
Timer 2 Compare Toggle Mask bit
T2CTM = 0, disable compare toggle
T2CTM = 1, enable compare toggle, a match of the counter with the compare
Timer 2 Reset Mask bit
T2RM = 0, disable counter reset
T2RM = 1, enable counter reset, a match of the counter with the compare register
Timer 2 Interrupt Mask bit
T2IM = 0, disable Timer 2 interrupt
T2IM = 1, enable Timer 2 interrupt
Timer 2 Toggle Mask Bits
7
Bit 2
T2CTM
resets the counter
flip-flop (TOG2). If the T2OTM bit is set, only a counter overflow
can generate an interrupt except on the Timer 2 output mode 7
register toggles output flip-flop (TOG2). In Timer 2 output mode 7
and when the T2CTM bit is set, only a match of the counter with the
compare register can generate an interrupt
Bit 3
Bit 3
Bit 7
Bit 1
T2RM
T2OTM
0
1
x
Bit 2
Bit 2
Bit 6
Bit 0
T2IM
Address: '7'hex — Subaddress: '4'hex
Bit 1
Address: '7’hex — Subaddress: '5'hex
Bit 1
Bit 5
T2CTM
Address: '7'hex — Subaddress: '3'hex
Reset value: 0000b
x
x
1
Bit 0
Bit 4
Bit 0
Timer 2 Interrupt Source
Compare match (CM2)
Overflow (OVF2)
Compare match (CM2)
Reset value: 1111b
Reset value: 1111b
Reset value: 1111b
4679D–4BMCU–05/05
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