ATAM894R-TNSY Atmel, ATAM894R-TNSY Datasheet - Page 75
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ATAM894R-TNSY
Manufacturer Part Number
ATAM894R-TNSY
Description
flash, Microcontrollers, Microprocessors, Semiconductors and Actives, ic, mcu
Manufacturer
Atmel
Datasheet
1.ATAM894R-TNSY.pdf
(97 pages)
- Current page: 75 of 97
- Download datasheet (2Mb)
6.3.5.2
Figure 6-54. Combination Timer 3 and SSI
4679D–4BMCU–05/05
T3I
Combination Mode Timer 3 and SSI
SYSCL
T1OUT
POUT
T3EX
T3CS
CL3
RES
Combination Mode 6: FSK Modulation
SSI mode 1:
Timer 3 mode 8:
The two compare registers are used to generate two varied time intervals. The SSI data output
selects which compare register is used for the output frequency generation. A '0'-level at the SSI
data output enables the compare register 1 and a '1'-level enables the compare register 2. The
compare and compare mode registers must be programmed to generate the two frequencies via
the output toggle flip-lop. The SSI can be supplied with the toggle signal of Timer 2 or any other
clock source. The Timer 3 counter is driven by an internal or external clock source.
Compare 3/1
T3CO1
T1OUT
SYSCL
POUT
TOG2
8-bit Counter 3
T3CP
Compare 3/2
SCLI
T3CO2
SIC1
CP3
8-bit shift register internal data output (SO) to the Timer 3
FSK modulation with shift register data (SO)
I/O-bus
Transmit buffer
Shift_CL
SO
SIC2
T3CM1
MSB
T3C
Timer 3 - control
STB
SSI-control
8-bit shift register
I/O-bus
T3CM2
T3ST
SISC
SRB
LSB
Receive buffer
Control
SI
INT3
T3M
Output
T3EX
T3I
CM31
RES
INT5
TOG3
Control
M2
SO
SI
SC
Modulator 3
Demodu-
lator 3
MCL_SC
MCL_SD
ATAM894
SC
SI
T3O
SC
SI
75
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